AM3352: DDR self-refresh MRS command

Hiroyasu Tazawa1

Part Number: AM3352

Hi, Everyone

I have a question about Self-Refresh of AM335x.

My customer use DDR3 of MT41K256M16TW-107 and want to enter Self-Refresh.
This Micron's DDR3 datasheet mentions that It need MRS command before enter Self-Refresh(SRE).
This MRS command means diable DLL by setting MR1[0] to 1.

Now my customer set REG_LP_MODE = 2 for Self-Refresh.
Is MRS command send from AM335x to DDR before Self-Refresh command when REG_LP_MODE = 2.

I do not see this command in AM335x TRM.

Best Regards
Hiroyasu

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Please see section 7.3.3.12.2 of the AM335x TRM Rev. O. Everything necessary is explained there.

0 Hiroyasu Tazawa1 over 8 years ago in reply to Biser Gatchev-XID

Guru 12350 points

Hi, Biser

I'm sorry and Thank you !

Best Regards
Hiroyasu

0 Hiroyasu Tazawa1 over 8 years ago in reply to Hiroyasu Tazawa1

Guru 12350 points

Hi, again

I'm sorry, I want to confirm this.

TRM mention that

the memory controller automatically stops the clocks DDR_CLK to the SDRAM. The
memory controller maintains DDR_CKE low to maintain the self-refresh state.

I understand MRS is send from AM335x,
This understanding correct ?

Best Regards
Hiroyasu

0 Biser Gatchev-XID over 8 years ago in reply to Hiroyasu Tazawa1

TI__Guru**** 393215 points

Yes, these are automatic functions of the EMIF controller.

0 Hiroyasu Tazawa1 over 8 years ago in reply to Biser Gatchev-XID

Guru 12350 points

O.K. Thank you !

Best Regards
Hiroyasu

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AM3352: DDR self-refresh MRS command