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Low speed ATA for writing data to HDD on DM6446

Eugeny Nikolaychuk
Prodigy 100 points

Hello!

We use DM6446 EVM (OS Montavista Linux Pro v5.0) with ATA interface connected to solid HDD, which allow to achieve up to 90 MB/s reads and 90 MB/s writes. We run TI's  ATA Perfomance test bench (“pspTest” utility from LPTB-02.03.00.02-beta) for Ultra DMA 5 mode (by command “hdparm -d1 -X69 /dev/hda”) and get next results.

In case buffer and file size 50 Mega Bytes we have file write speed 11.199174  Mega Bytes/Sec only and 89.53% percentage cpu load, file read 23.972218 Mega Bytes/Sec and 67.12% percentage cpu load when DMA use. (We have file write speed  4.103836 Mega Bytes/Sec and 96.55% percentage cpu load when DMA not use.)
In case buffer size 5 Mega Bytes and file size 50 Mega Bytes  we have file write speed  7.187637 Mega Bytes/Sec only and 55.28% percentage cpu load, file read 41.078712 Mega Bytes/Sec and 76.56% percentage cpu load when DMA use. (We have file write speed 3.710023 Mega Bytes/Sec and 86.22% percentage cpu load when DMA not use.)

How can we increase file write speed to 90 Mega Bytes/Sec for Ultra DMA 5 mode on DM6446 EVM and decrease percentage cpu load?

Thanks and Best Regards,
Eugeny Nickolaychuk

  • 0
    TI__Expert 7435 points

    Eugeny,

    90MBps figure that you quote seems to be theoretical max at udma5.  If you put a PATA Analyzer on the bus you would be able to see that DM644x is indeed able to sustain this throughput on the bus for all transactions.

    The lower throughput numbers you are quoting are in the context of Linux system.  The primary contributors to lower throughput and the associated cpu loading are

    • Processing in kernel block device layer, filesystem and ata stack.
    • Scatter gather mechanism in the kernel and the associated processing.
    • Latencies involved in a practical system were in one might run other apps in parallel.
    • Bufferring logic in both the app and the resto of the intermediate layers.

    Pl. note that in each of the above layers there is quite bit of data copies involved and they contribute to the increased cpu loading.  Suppose if you could overclock the ARM then you would see significant improvement in throughput (cpu loading would not change much as one has to significantly over clock ARM to reach a break even point).

    The primary points of optimization would be the block scheduler, block chaching and free policy, file system commits times etc.  In general the optimization would have to be spread across the whole stack in short.

    regards

    swami

  • 0 in reply to swami
    Prodigy 100 points

    Can I get any DM644x ATA interface write data testing results to any hard disk please ?

    Has Texas Instruments a similar informations (the real write data speed to HDD) for DM644x EVM ?

    Thanks and Best Regards,
    Eugeny Nickolaychuk