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RTOS/PROCESSOR-SDK-AM57X: Changing UARTs in example code not working

Part Number: PROCESSOR-SDK-AM57X

Tool/software: TI-RTOS

The  UART_BasicExample_evmAM572x_armTestproject located at  "C:\ti\pdk_am57xx_1_0_5\packages\MyExampleProjects\UART_BasicExample_evmAM572x_armTestproject" is defaulted to UART 3.

I am running the code on a Beagle Board X15 that is part of the AM572x EVM development kit.

It appears that the pinmux for the board has been configured to support using UART 1 and the UART 1 Tx and Rx come off the board to connector.

From what I understand I just need to change the UART_INSTANCE from a default value of 2 (UART 3)  to a value of 0 (UART 1).

I have tried this per the following snippet but do not see any activity on the Xmt line looking at it with a scope.

* ======== UART read/write test ========
*
* The test function tests read/write in blocking mode
*/
static bool UART_test_read_write(bool dmaMode)
{
UART_Handle uart = NULL;
UART_Params uartParams;
int length = 0;
uint32_t addrDataPrint, addrScanPrompt, addrEchoPrompt;
UART_Transaction transaction;
bool ret = false;


char outstring[26] = "abcdefghijklmnopqrstuvwxyz";
int i, cnt=10;

/* UART SoC init configuration */
UART_initConfig(dmaMode);

/* Initialize the default configuration params. */
UART_Params_init(&uartParams);

//uartParams.baudRate = 230400;

#define UART_ONE 0
#define UART_THREE 2

uart = UART_open(UART_ONE, &uartParams);
if (uart == NULL)
{
goto Err;
}

for(i=0; i<1000; i++)
{

//UART_jjdbg(cnt++);
UART_write(uart, (void *)outstring, sizeof(outstring));
}

I would appreciate any guidance that could be provided.

  • Jim,

    UART_INSTANCE is not the only change that is required to change the UART instance in the code. you need to check that the instance you want to use is power up and is being clocked. If the pinmux is not configured you will need to change the PADCONFIG settings and also configure the clocks .

    All of these changes need to happen in the board library for evmAM572x. Here is a good example using Beagle bone that you may find useful:
    www.ti.com/.../sprac32.pdf

    On evmAM572x, we have been able to enable UART9 pins from the expansion connector as I have described in my post here:
    e2e.ti.com/.../2085526


    Hope this helps.

    Regards,
    Rahul
  • Rahul,
    Thanks for the rapid response.
    The differences between this SDK and the example in sprac32.pdf are many and I did not find it very useful.
    It appears that in this SDK UART 1 is already configured, and should work, per the following files with the exception of changing the BOARD_UART_INSTANCE from 2 to 0. However, if I do this does it disable UART 3? I thought I could define the instance in the application such as:

    #define UART_ONE 0
    #define UART_THREE 2
    uart = UART_open(UART_ONE, &uartParams);

    What I need to do is communicate to the 5 UARTS (1, 3, 8, 9, 10) that are wired up on the EVM from the CortexA15_0 with RTOS. I need to read/write to some 3.3V serial peripherals (just Tx and Rx). I don't think I need a buffer as long as I am careful.
    Do you think this is possible using this EVM and SDK?

    C:\ti\pdk_am57xx_1_0_5\packages\ti\board\src\evmAM572x\include\board_cfg.h

    /*jj adding the following to be able to build for loading from CCS */
    #define PDK_RAW_BOOT
    /* UART LLD instance number */
    #define BOARD_UART_INSTANCE 2

    I believe that if I make changes to board_cfg.h and any of the following files I will need to rebuild the board library, true?. I modified the board_cfg.h to add #define PDK_RAW_BOOT, can I leave this in and rebuild with the expectation that everything will work correctly?

    C:\ti\pdk_am57xx_1_0_5\packages\ti\board\src\evmAM572x\evmAM572x_clock.c

    CSL_FINST(l4PerCmReg->CM_L4PER_UART1_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER_UART1_CLKCTRL_REG_MODULEMODE, ENABLE);
    while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART1_CLKCTRL_REG_IDLEST_FUNC !=
    CSL_FEXT(l4PerCmReg->CM_L4PER_UART1_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER_UART1_CLKCTRL_REG_IDLEST));
    CSL_FINST(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_MODULEMODE, ENABLE);
    while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST_FUNC !=
    CSL_FEXT(l4PerCmReg->CM_L4PER_UART3_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER_UART3_CLKCTRL_REG_IDLEST));

    In your example you had:
    CSL_FINST(l4PerCmReg->CM_L4PER2_UART9_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_MODULEMODE, ENABLE);
    while(CSL_L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_IDLEST_FUNC !=
    CSL_FEXT(l4PerCmReg->CM_L4PER2_UART9_CLKCTRL_REG,
    L4PER_CM_CORE_COMPONENT_CM_L4PER2_UART9_CLKCTRL_REG_IDLEST));

    For UART1 and UART3 in the file that I have it does not have L4PER2. What is the difference between L4PER2 in your example and L4PER in my code?

    C:\ti\pdk_am57xx_1_0_5\packages\ti\board\src\evmAM572x\boardPadDelayInit.c

    /* UART8 - uart8_rxd on C18 - UART8 (exp) */
    {0x1734, 0x60003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART8 - uart8_txd on A21 - UART8 (exp) */
    {0x1738, 0x00003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART8 - uart8_ctsn on G16 - UART8 (exp) */
    {0x173C, 0x40003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART8 - uart8_rtsn on D17 - UART8 (exp) */
    {0x1740, 0x20003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART9 - uart9_rxd on AA3 - UART9 */
    {0x1744, 0x60003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART9 - uart9_txd on AB9 - UART9 */
    {0x1748, 0x00003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART9 - uart9_ctsn on AB3 - UART9 */
    {0x174C, 0x40003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART9 - uart9_rtsn on AA4 - UART9 */
    {0x1750, 0x20003, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART3 - uart3_rxd on D27 - UART3 (FTDI) */
    {0x17F8, 0x60002, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART3 - uart3_txd on C28 - UART3 (FTDI) */
    {0x17FC, 0x00001, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART1 - uart1_rxd on B27 - UART1 */
    {0x17E0, 0x60000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART1 - uart1_txd on C26 - UART1 */
    {0x17E4, 0x00000, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART10 - uart10_rxd on D1 - UART10 */
    {0x1570, 0x40008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART10 - uart10_txd on E2 - UART10 */
    {0x1574, 0x00008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART10 - uart10_ctsn on D2 - UART10 */
    {0x1578, 0x40008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},
    /* UART10 - uart10_rtsn on F4 - UART10 */
    {0x157C, 0x00008, {0x0, 0, 0}, {0x0, 0, 0}, {0x0, 0, 0}},

    C:\ti\pdk_am57xx_1_0_5\packages\ti\board\src\evmAM572x\evmAM572x_SR2.0.pinmux
    Extracted UART information from mAM572x_SR2.0.pinmux aligns with boardPadDelayInit.c above and aligns with schematic expansion connectors.
    UART 8
    nameDecoratorText: "C18",
    assignedToName: "uart8_rxd", P17 33
    nameDecoratorText: "A21",
    assignedToName: "uart8_txd", P17 27
    nameDecoratorText: "G16",
    assignedToName: "uart8_ctsn", P17 11
    nameDecoratorText: "D17",
    assignedToName: "uart8_rtsn", P17 14
    UART 9
    nameDecoratorText: "AA3",
    assignedToName: "uart9_rxd", P17 10
    nameDecoratorText: "AB9",
    assignedToName: "uart9_txd", P17 9
    nameDecoratorText: "AB3",
    assignedToName: "uart9_ctsn", P17 40
    nameDecoratorText: "AA4",
    assignedToName: "uart9_rtsn", P17 39
    UART 3
    nameDecoratorText: "D27",
    assignedToName: "uart3_rxd", P10 4
    nameDecoratorText: "C28",
    assignedToName: "uart3_txd", P10 5
    UART 1
    nameDecoratorText: "B27",
    assignedToName: "uart1_rxd", P18 60
    nameDecoratorText: "C26",
    assignedToName: "uart1_txd", P18 30
    UART 10
    nameDecoratorText: "D1",
    assignedToName: "uart10_rxd", P18 12
    nameDecoratorText: "E2",
    assignedToName: "uart10_txd", P18 42
    nameDecoratorText: "D2",
    assignedToName: "uart10_ctsn", P18 13
    nameDecoratorText: "F4",
    assignedToName: "uart10_rtsn", P18 8

    Thanks,
    Jim
  • Raul,
    Any comments to my questions on the last post?
    Thanks,
    Jim
  • Rahul,
    Primarily I am wanting to know if it is possible to control more than one UART from a single CortexA15 core. My application needs to control 5 UARTs.
    Thanks,
    Jim