66AK2G02: PCIe Link up Time specification

g.f.

Part Number: 66AK2G02

Hi,

I have a question about 66AK2G02 PCIe.

Are there any timing specification for PCIe linkup?
We want to know following min/max timing requirement if there are any:
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I want to know the time of PCIe linkup need to be done after PCIe Power Domain got on.
Timing requirement between PCIe Power domain "ON" to PCIe linkup(active).
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best regards,
g.f.

over 9 years ago

0 Cvetolin Shulev-XID over 9 years ago

TI__Guru 65405 points

Hi g.f.,

I've forwarded this to the design experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Yordan Kovachev over 9 years ago

TI__Guru**** 161600 points

Hi,

The PCIE in K2G is fully compliant with:
PCI Local Bus Specification revision 3.0
and
PCI Express Base 3.0 Specification, revision 2.0

The specific timings you need should be described there.

Best Regards,
Yordan

0 Tom Johnson 16214 over 9 years ago in reply to Yordan Kovachev

TI__Mastermind 46460 points

Gaku,

Please also refer to the PCIe link status state machine in the above referenced spec. This is not all driven by hardware. There is software involved in this process that also affects the timing.

Tom

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66AK2G02: PCIe Link up Time specification