Hi,
I am trying flashing at nor_flash the example USB (mouse) supplied by Spetrum Digital of 5515ezdsp (v1). I changed the .cmd more than ten times but it does not work (.cmd is below). I elaborated my .cmd mixing the .cmd supply by Spetrum Digital at EZDSP_Sample and the .cmd of the example USB. I am ok with the procedure to record flash, I did it a couple of times changing the EZDSP_Sample.
In all my tries I corrupted the memory (error is below) and the CCS stops to connect to target, so, “What I did was to corrupt the data lines of the NOR-Flash chip at the boot time so that the DSP boot-loader will fail to read the boot signature from the flash chip. This prevented the faulty code to load to the DSP and run from it.” according posted by Anand CV on Tue, Jul 27 2010 1:32 AM onTI E2E Community about Flashing in C5505 eZdsp.
After this action I flash the EZDSP_Sample and it works correctly but when I flash the USB example it does not work and the memory is corrupted again.
I believe that the problem is in .cmd file but I cannot find this error. Please, could anybody help me?
Regards,
Andrea
Error:
C55xx: Error connecting to the target: Error 0x80000242/-1143 Fatal Error during: Memory, Initialization, OCS, The memory at 0x000000BE continually indicated it was 'not ready' All memory operations currently in progress were aborted in order to regain control of the processor. This is considered a catastrophic event, but the debugger should still be able to access memory and CPU registers. System state has been altered. It is strongly advised that the processor should be reset before resuming execution,
File.cmd
/*-stack 0x1000*/
/*-sysstack 0x1000*/
/*-heap 0x1000*/
MEMORY
{
MMR (RW) : origin = 0000000h length = 0000c0h /* 192 bytes memory-mapped registers*/
VEC (RX) : origin = 00000c0h length = 000300h /* 768 bytes on-chip ROM vectors */
DARAM_0 (RW) : origin = 0000400h length = 001C00h /* 7KB on-chip DARAM 0 */
DARAM_1 (RW) : origin = 0002000h length = 002000h /* 8KB on-chip DARAM 1 */
DARAM_2 (RW) : origin = 0004000h length = 002000h /* 8KB on-chip DARAM 2 */
DARAM_3 (RW) : origin = 0006000h length = 002000h /* 8KB on-chip DARAM 3 */
DARAM_4 (RW) : origin = 0008000h length = 008000h /* 32KB on-chip DARAM 4 */
SARAM_0 (RW) : origin = 0010000h length = 020000h /* on-chip 256KB SARAM 0 */
USBBUF (RW) : origin = 0030000h length = 020000h /* USB buffer allocation */
SAROM_0 (RX) : origin = 0fe0000h length = 008000h /* on-chip ROM 0 */
SAROM_1 (RX) : origin = 0fe8000h length = 008000h /* on-chip ROM 1 */
SAROM_2 (RX) : origin = 0ff0000h length = 008000h /* on-chip ROM 2 */
SAROM_3 (RX) : origin = 0ff8000h length = 008000h /* on-chip ROM 3 */
EMIF_CS0 (RW): origin = 0050000h length = 07B0000h /* mSDR */
EMIF_CS2 (RW): origin = 0800000h length = 0400000h /* ASYNC1 : NAND */
EMIF_CS3 (RW): origin = 0C00000h length = 0200000h /* ASYNC2 : NAND */
EMIF_CS4 (RW): origin = 0E00000h length = 0100000h /* ASYNC3 : NOR */
EMIF_CS5 (RW): origin = 0F00000h length = 00E0000h /* ASYNC4 : SRAM */
}
SECTIONS
{
vectors (NOLOAD)
.bss : > DARAM_1 /*, fill = 0*/
vector : > DARAM_1 ALIGN = 256
.text : > SARAM_0 ALIGN = 4
.stack : > SARAM_0 ALIGN = 4
.sysstack : > SARAM_0 ALIGN = 4
.data : > DARAM_1
.cinit : > DARAM_2
.const : > DARAM_2
.sysmem : > DARAM_3
.buffer1 : > DARAM_0
.buffer2 : > DARAM_0
.switch : > DARAM_4
.cio : > DARAM_1
.usbBuffer : > USBBUF
.emif_cs0 : > EMIF_CS0
.emif_cs2 : > EMIF_CS2
.emif_cs3 : > EMIF_CS3
.emif_cs4 : > EMIF_CS4
.emif_cs5 : > EMIF_CS5
}
