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PMIC of JACINTO6 changes

Ben Tseng
Intellectual 320 points


Hi

What is difference between O9039A371IZWSRQ1 & O9039A387IZWSRQ1 ?

Due to material shortage that we will change PMIC of J6 to O9039A371IZWSRQ1.

Could we change PMIC form O9039A387IZWSRQ1 change to O9039A371IZWSRQ1 directly without any software change?

Thank you. 

  • 0
    TI__Mastermind 30310 points
    Ben,

    I have assigned this post to the expert on the TPS659038 device and he will respond to your inquiry as soon as possible.
  • 0 in reply to Brian Berner
    TI__Genius 16410 points
    Ben,

    O9039A371IZWSRQ1 (OTP 0x71) is not compatible with hardware designed for O9039A387IZWSRQ1 (OTP 0x87). OTP 0x87 uses SMPS123 in triple phase, which means SMPS1/2/3 will be combined on the PCB.

    However OTP 0x71 uses SMPS12 in dual-phase and SMPS3 as single-phase. If you use 0x71 on a board designed for 0x87, you will short SMPS12 with SMPS3, and the device will not work correctly and may be damaged.

    Regards,
    Karl
  • 0 in reply to Karl Wallinger
    Intellectual 320 points

    Hi Karl,

    Thank you for your comment.

    Is there only SMPS1/2/3 difference between OTP 0x71, OTP 0x87?

    Does it possible co-design for OTP 0x71 and 0x87 If we place the solder jumper for split SMPS3 with SMPS1/2.

    For other question about input voltage of PMIC.

    Our customer design the LGA module with OTP 0x71 that the supply voltage of PMIC is 5V.

    But our carrier Board design supply voltage is 3.3V with OTP 0x87.

    Beside the SMPS1/2/3 difference, could we change the supply voltage from 5V to 3.3V?

    May i send the schematic in PDF by mail to you for review?

    thank you.

  • 0 in reply to Ben Tseng
    TI__Genius 16410 points
    Hi Ben,

    There are a couple other differences.

    In 0x71, DDR is supplied by SMPS3, and GPIO_6 is used for a reset signal to the procsesor. 0x87 uses an external buck controlled by GPIO_6 to power DDR.

    In 0x71, GPIO_2 comes up first in the power-up sequence, and goes down last in the power-down sequence. In 0x87, GPIO_2 is unused.

    I think the major differences are SMPS12/123 phase difference, and the DDR supply. I'd be a little concerned about using a solder jumper for SMPS123 triple phase, since this will increase the impedance from SMPS3 to the load in triple phase. It may not have an impact, but you would want to make sure the power analysis still meets the system requirements in this case. You would likely need this same solder connection for DDR, and the same comment applies there.

    Regarding input voltage, both devices can support 3.3V and 5V input. Just make sure the 3.3V LDOs (LDO1, LDO2, LDOUSB) have 5V input to meet the dropout requirements.

    Regards,
    Karl