Other Parts Discussed in Thread: SYSBIOS
Tool/software: TI-RTOS
We are using AM571X, with SYS/BIOS on C66 and Linux on A15. We have CMEM shared memory between C66 and A15.
We want to disable caching of CMEM (DDR) on C66.
Is this the correct way in SYSBIOS configuration:
/*
* ========= Cache ===========================
*/
/* Disable Caching for CMEM (Physical address: 0x9F000000, Size 16 MB) */
var Cache = xdc.useModule('ti.sysbios.family.c66.Cache');
//Cache.MAR_128_159 = 0x7FFFFFFF;
var temp = Cache.getMarMeta ( 0x9F000000 );
Cache.setMarMeta (0x9F000000, 0x1000000, temp | (~Cache.PC) );
Note that "Cache.MAR_128_159 = 0x7FFFFFFF" does not compile on C66.
How can we check we caching is indeed disabled in MAR registers ? Is there a way to read registers ?
Thanks,
Paritosh
