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8bit CMOS-VPFE integration SYN_MODE.DATSIZ

Hi all,

I have Leopard imaging LI-VM01CM camera module (uses Aptina MT9V113) and try to integrate it with DM6446EVM. I can take 8bit RAW data from the sensor and show it on my 4,3" digital LCD using prev_vga_example (found on Leopardimaging website) which takes 10 bit RAW,  processes in preview engine  and displays on LCD.  Since example uses 10 bit RAW data on (CCD2-CCD11) and I have connected 8bit RAW to (CCD0-CCD7) there is so much artifact on the video seen on the LCD.

What I want to do is

1)To configure the VPFE so that "SYN_MODE.DATSIZ" is set to "8" and modify the example to take 8bit RAW (not 10bit).

2)To learn the meaning of the sentence in SPRUE38E 4.3.1.1 page 38 which confuses me a lot:

"Data is right-shifted to align the data in the least significant bits of the data bus and provide the maximum dynamic range for the remainder of the processing (SYN_MODE.DATSIZ)."

I have connected CCD0-CCD7 to the sensor's 8bit data output but assuming no shift on it.

3)To learn the reason why LI-3M01 demo board of Leopard imaging connected CCD2-CCD11 to 10-bit RAW sensor output? (Is there really a shift on the bus?)

 

Waiting your replies,

Ferhat

 

 

 

 

 

  • You have interpreted the specification correctly; in 8-bit mode you should connect to CCD0-CCD7.

    with regards to LI-3M01 leopard board, I am afraid I cannot confirm the connection you are suggesting above; im the 50-pin connector to EVM, I can see from LI-3M01 User Guide that all CCD pins are connected including CCD0-CCD1.  Is there a link to the board schematics you can point me to?   How are you determining that CCD2-CCD11 are being used for 10-bit RAW mode?  If this is true, I would find this very interesting, but since this board is built and supported by Leopard Imaging, I am afraid you may have to go to them to figure out why they made such connection..

     

  •  In the user guide of LI-3M01 it is explained as below:

    10-bit mode: sensor data bus d[9:0] are connected to J2 d[11:2]. And J2 d[1:0] are grounded, J2 d[15:12] are floating

    When I asked them, they said me that this is just to make it possible to connect 12 bit outputted sensor also.

    However I

    am curious about the below sentence in SPRUE38E:    

     

     

    -"Data is right-shifted to align the data in the least significant bits of the data bus and provide the maximum dynamic range for the remainder of the processing SYN_MODE.DATSIZ"

    -The original prev_vga_example software supplied by leopard imaging also uses .data_sz=_10BITS which also made me thought about the right-shift in CCDC.

     

  • according to our spec, if you specify 10-bit, data at CCD input will be right shifted such that when reading 16-bit CCD input, the 10-bit input will correspond to first 10 LSBs, ant the remaining 6-bits will be filled with 0s ingoring what is at CCD 11-15.  This is the interpretation you should be getting from our spec; we have also included Figures that described how data may look in DDR2 as a result of this shifting. 

    This means that if you are designing for 10-bit input, you want to use CCD9-CCD0 as you originally suggested.

    With regards to Leopard Imaging design, they want the flexibility to choose among 8-bit, 10-bit, or 12 bit sensor inputs without having to redesign their hardware boards.  In this case, they will assume 12-bit inputs to DM644x and adjust things on their board's end.  Therefore, they can assume DM6446 will always be configured for 12-bit input mode (ccd11-ccd0), but in case where the LI-3M01 is configured for 10-bit mode, they will simply pass 0s to DM644x CCD1-CCD0 input pins; to DM6446, this will simply mean it is operating in 12-bit mode but the sensor is never sending all possible color resolutions (2^12 colors possible), which is fine because in 10-bit mode, sensor is only capable of passing 2^8 color combinations anyway, even though DM6446 is configured for more..  This is an acceptable way of supporting all three size sensors with a single hardware design.  The thing worth pointing out here is that DM644x is operating in 12-bit mode and hence it is right shifting the first 12 bits (LSBs) and filling the remaining 4 MSBs with 0s before storing data in DDR2. 

  • Thanks for your clear explanations.

    Ferhat

  • In order to take 8 bit RAW data and process it on preview engine I modified prev_vga_example (found on leopard imaging web site) which takes 10 bit RAW such that:

    1- SYN_MODE.DATSIZ becomes _8BITS  (in original code  raw_params.data_sz = _10BITS )

    2- PCR.WIDTH becomes 8 bit wide also (in original code params.size_params.pixsize = PREV_INWIDTH_10BIT)

    When I did the above changes view becomes grayscale and I only determine the contrasts which is much worse than the 10 bit width is setted.

    Are there any settings that I should take care to modify the example to take 8 bit raw and process it in 8 bit form?

     

    Notes:

    -Tried 8 bits/pixel by setting SYN_MODE.PACK8 and SYN_MODE.DATSIZ = 8bit which results in no video at all.

    -Tried 16bit/pixels with SYN_MODE.DATSIZ =8 bit again which results in a video with same quality as 10 bit sizes.

    -Tried PCR.WIDTH =8 bit wide only which results in a video with grayscale, only contrasts are determined.

     

    Ferhat

     

  • not sure I understand your goal; at the front end you have two paths  1) CCD -> previewer or 2) CCD --> SDRAM --> previewer.  Which path are you using...  The PACK8 and PCR.WIDTH setting only apply to tha latter where previewer is getting its data from SDRAM; if you are indeed using tha latter path (SDRAM-> previewer), then there are other things to set (see Table 39 in VPFE doc).

     

  • I have a working prev_vga_example which takes 10 bit raw data from leopard imaging LI-3M01 camera  board (uses Aptina MT9T001).  This example can be downloaded from Leopard imaging web site. It uses CCD->SDRAM->previewer. In summary it works as below:

    *************************************************************************************************

     InitCaptureDevice(CAP_FORMAT, CAP_WIDTH, CAP_HEIGHT);

     InitPreviewer(CAP_WIDTH, CAP_HEIGHT, &prevbuffer);
     InitDisplayDevice();
    StartStreaming();

     SetDigitalGain(digital_global_gain,red_gain,green_gain,blue_gain);
     set_analog_gain(analog_r_gain,analog_g1_gain,analog_g2_gain,analog_b_gain); // 1-63

     for (;;){
      if (ChkKeyBrdAndSetGain() == -1 ) return -1;
      CaptureFrame(&capbuf_phyaddr,&buf_addr);
      DoPreview(CAP_WIDTH, CAP_HEIGHT, capbuf_phyaddr);
      DisplayFrame(prevbuffer.start, VGA_WIDTH, VGA_HEIGHT);
     }   /*End of for loop */

     ****************************************************************************************

    I can also run this example with my designed daughtercard which captures from LI-VM01CM camera module which uses (Aptina's MT9V113) and displays it on my 480x272 LCD. 

    Since LI-VM01CM outputs 8 bit RAW

    - I have to modify CCDC and Preview Engine to take 8 bit RAW taken from MT9V113 (not 10 bit from MT9T001)

    In order to modify the example to take 8 bit RAW the only registers that I can found related are :

    -SYN_MODE.DATSIZ and PCR.WIDTH

    I tried to set both SYN_MODE.DATSIZ and PCR.WIDTH to "8"  but it causes not to see an image on my LCD (just a gray contrasted image).

    In short, I want to configure CCDC and preview engine to take 8 bit RAW in my working example which is configured to take 10 bit RAW.