Starterware/AM3359: am3359

Tool/software: Starterware

Hi,

I am interfacing ADS131E08 adc(TIDA-0061) board with AM3359 ICE board(TMDXICE3359).

ADC SPI is interfaced to AM3359 SPI1 instance.

ADC DRDY pin in connected to GPIO3 pin 20 and PIN 20 is configured for falling edge interrupt.

In GPIO ISR I am triggering SPI DMA transfer event and on SPI1 TX and RX DMA completion event I am transferring DMA RX buffer to my internal buffer.

I have taken starterware SPI DMA code as reference and using IAR ARM compiler.

When I am trying to read SPI1 DAM rx buffer ,first time it is showing values of ADC frame(3 status byte ans 27 byte for 8 ADC channel),but after on next DAM ISR event data is not updating in Rx buffet.

If i comment the code to read from rx buffer, I can see data is updating in Rx buffer in debugger watch window.

I can observe updating data on SPI bus on logic analyser,but Rx buffer is not updating same.

I tried to both enable and disable cache but there is no change in rx buffer behaviour..

/* DMA call back routine */

static void CallBack(unsigned int tccNum, unsigned int status)
{
volatile static int samples=0,chn=0,ADC_Channel_Buffer[8];
unsigned char Reset=1;
unsigned char *temp=NULL;
volatile static char tempBuffer[30];
if(tccNum == MCSPI_TX_EVENT)
{
flagTx = 1;

/* Disable McSPI Transmit event */
McSPIDMADisable(SOC_SPI_1_REGS, MCSPI_DMA_TX_EVENT, MCSPI_CH_NUM);

}

if(tccNum == MCSPI_RX_EVENT)
{
flagRx = 1;

/* Disable McSPI Receive event */
McSPIDMADisable(SOC_SPI_1_REGS, MCSPI_DMA_RX_EVENT, MCSPI_CH_NUM);
}
if( (flagTx == 1) && (flagRx==1) && (flagISR==1) )
{


chn=0;
memcpy(tempBuffer,ucptrRxBuff,30);
// for(int x=3;x<27;x=x+3)
//{
//ADC_Channel_Buffer[chn]=0;
//ADC_Channel_Buffer[chn]=(int)((((int)ucptrRxBuff[x]<<24)|(((int) ucptrRxBuff[x+1])<<16)| ((int)ucptrRxBuff[x+2]<<8))/0xff);
//ADC_Channel_Buffer[chn]=(int)((((int)ucptrRxBuff<<24)|(((int) ucptrRxBuff+1)<<16)| ((int)ucptrRxBuff[x+2]<<8))/0xff);
//chn++;
//}
// if(tempBuffer[0]!=rxBuffer[5])
// tempBuffer[0]=rxBuffer[5];

// temp=(unsigned char *)&rxBuffer[0];
/* for(int x=0;x<30;x++)
{
tempBuffer[x]=*temp;
temp++;
// tempBuffer[x]=rxBuffer[x];
rxBuffer[x]=0;
}*/
SmartSampling_MultiChannelResample(& SmartChannels[0],(INT32*) &ADC_Channel_Buffer[0],Reset);
if (SmartChannels[0].Buffer.ValuesInBuffer > 0)
{
//transfer data
//assuming no fault
if (samples>31)
samples=0;

for(int x=0;x<8;x++)
{
channel[x][samples]=0;
channel[x][samples]= ADC_Channel_Buffer[x];
}
samples++;

}
McSPICSDeAssert(SOC_SPI_1_REGS, MCSPI_CH_NUM);
McSPIChannelDisable(SOC_SPI_1_REGS, MCSPI_CH_NUM);
GPIOPinIntEnable(GPIO_INST_BASE_ADD_CD,
GPIO_INT_LINE_1,
GPIO_CD_PIN_NUM%32);
flagTx=0;
flagRx=0;
flagISR=0;
Reset=0;
}
}

/*GPIO ISR */

/*
** GPIO Interrupt Service Routine.
configured for output from ADC drdy pin
Triggered at EOC rate of adc
*/
extern unsigned char flagISR;
void GPIOIsr(void)
{
/* Check the Interrupt Status of the GPIO Card Detect pin. */
if(GPIOPinIntStatus(GPIO_INST_BASE_ADD_CD,
GPIO_INT_LINE_1,
GPIO_CD_PIN_NUM%32) & (1 << GPIO_CD_PIN_NUM%32))
{
/* Clear the Interrupt Status of the GPIO Card Detect pin. */
GPIOPinIntClear(GPIO_INST_BASE_ADD_CD,
GPIO_INT_LINE_1,
GPIO_CD_PIN_NUM%32);
GPIOPinIntDisable(GPIO_INST_BASE_ADD_CD,
GPIO_INT_LINE_1,
GPIO_CD_PIN_NUM%32);
flagISR=1;
McSPITransfer_ISR(30);

}
/***** if not using DMA

//gpioIsrFlag = 1; */
}

/* channel configuration */

/*Init DMA for ISR transfer
*/
void ADC_Init_ISR_DAM(void)
{

unsigned short length = 0;
for(int i=0;i<35;i++)
txBuffer[i] = (0x00);
length = 30;

/* Configure the flash status read parameters of McSPI for Edma transmit.*/
McSpiTxEdmaParamSet(MCSPI_TX_EVENT, MCSPI_TX_EVENT, txBuffer,
length);

/* Configure the flash status read parameters of McSPI for Edma receive.*/
McSpiRxEdmaParamSet(MCSPI_RX_EVENT, MCSPI_RX_EVENT, ucptrRxBuff,
length, TRUE);

/* Register the call-back function for Tx/Rx edma events of McSPI.*/
cb_Fxn[MCSPI_TX_EVENT] = &CallBack;
cb_Fxn[MCSPI_RX_EVENT] = &CallBack;
// McSPITransfer_ISR(24);
//McSPITransfer(length);
// IsADCBusy();
// return(rxBuffer[1]);
}

void McSPITransfer_ISR(unsigned short length)
{
/* Set the word count field with the data length to be transferred.*/
ADC_Init_ISR_DAM();
flagTx = 0;
flagRx = 0;
McSPIWordCountSet(SOC_SPI_1_REGS, length);

/* Force the SPIEN to low state.*/
McSPICSAssert(SOC_SPI_1_REGS, MCSPI_CH_NUM);

/* Enable the Tx/Rx DMA events for McSPI. */
McSPIDMAEnable(SOC_SPI_1_REGS, (MCSPI_DMA_RX_EVENT | MCSPI_DMA_TX_EVENT),
MCSPI_CH_NUM);

/* Enable the McSPI channel for communication.*/
McSPIChannelEnable(SOC_SPI_1_REGS, MCSPI_CH_NUM);
INTCPS_EnableIRQ(SYS_INT_EDMACOMPINT);
//Wait for control to return from ISR.*/
// while((0 == flagTx) || (flagRx == 0));

/* Force the SPIEN to high state.*/
// McSPICSDeAssert(SOC_SPI_1_REGS, MCSPI_CH_NUM);

/* Disable the McSPI channel for communication.*/
// McSPIChannelDisable(SOC_SPI_1_REGS, MCSPI_CH_NUM);
}

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