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McBSP to Multi McBSP

We're working on a design where one L138 needs to communicate with four C6474 DSPs. I found a great apnote about McBSP to McBSP communications which will be the starting point for the code. The appnote ties the Rx side of one McBSP to the Tx Side of the other McBSP and reverse:

 

 

As I'm trying to communicate from the L138  to multiple C6474s (the C6474s don't talk to each other, the L138 only talks to 1 C6474 at a time), I need to implement some kind of bus-switch. This way, at any point in time only 1 of the C6474s McBSP is connected to the L138 McBSP. An interrupt line per C6474 to the L138 allows the C6474s to signal they have something to say.

I'm new to McBSP and came up with the following questions after doing some research:

1) In McBSP the clocks (CLKX) seem to be always running, unlike in SPI. Is this correct?

2) On the receiver side, data only gets clocked in when the receiver gets a sync signal (FSR) transitions to the active state. Is that correct?

3) Assuming the former statement is correct, to implement a bus switch, I only have to switch (gate) the signals going from each C6474 to the L138 and the FSX line to the C6474s right?

 

There's also an appnote "spra491a" which describes a method to bus-network multiple DSPs. While very interesting, it doesn't allow me to achieve maximum throughput, which will be nice to have.

Is there a better way of doing this? it seems a bit awkward to do it this way. For one we'll need 4 muxes to implement the bus-switching (the L138 McBSP is 3.3v and the C6474 is 1.8v).

 

- Dirk

 

 

 

 

  • Dirk,

    I suggest you look into the TDM mode of the McBSP.  It will allow you to connect all the McBSPs to a single bus.  Each McBSP only transmits during a specific time slot and high-z's its output when it's time slot is up.  This approach would save the cost of the switch.

    Dirk Buijsman said:
    1) In McBSP the clocks (CLKX) seem to be always running, unlike in SPI. Is this correct?

    That is correct.

    Dirk Buijsman said:
    2) On the receiver side, data only gets clocked in when the receiver gets a sync signal (FSR) transitions to the active state. Is that correct?

    Yes.

    Dirk Buijsman said:
    3) Assuming the former statement is correct, to implement a bus switch, I only have to switch (gate) the signals going from each C6474 to the L138 and the FSX line to the C6474s right?

    Based on your connection diagram, your understanding is correct.