Hi,
I understand from the PCIe users guide that PCIECLK of 100 MHz is acceptable to meet the requirements for REFCLK. Is PCIECLK obtained from the Main PLL, which is set to 1 GHz on the EVM?
Thanks,
Viney
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Hi,
I understand from the PCIe users guide that PCIECLK of 100 MHz is acceptable to meet the requirements for REFCLK. Is PCIECLK obtained from the Main PLL, which is set to 1 GHz on the EVM?
Thanks,
Viney