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Linux/AM3352: LCD frequency not changing as per dts file

Rohit Khatri
Intellectual 990 points

Part Number: AM3352

Tool/software: Linux

Hi,

We have ported linux-4.4.12 based sdk and with this lcdc driver is reporting 6500 KHz clock in drm debug log which is as per dts file.

But when I probe it on CRO it reports 32MHz even I change clock to any value it is reporting as 32MHz on CRO. Which is resulting flicker and aliasing effect on lcd. LCD dimensions are 320x240.

We had same product on linux-3.2.0 based psp but it is reporting correct 6.5MHz. 

What is change in new drm based driver and old fbdev driver  and what we are doing wrong ?

BR,

Rohit Khatri

  • 0
    TI__Guru**** 393215 points
    The software team have been notified. They will respond here.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 990 points

    We have found solution of this problem and we are getting stable clock of 6.5 MHz.

    But there is new issue emerged with this.

    We have set logo in u-boot as well as kernel. So, when kernel starts we are seeing flicker for a second on LCD. We have verified clock is perfect in u-boot as well as kernel.

    I have attached video where you can see line of flicker at 3rd second. It is a moment when kernel boots. Timing parameters set in dts file are as below.

    panel {
    compatible = "ti,tilcdc,panel";
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&lcd_pins_s0>;
    panel-info {
    ac-bias = <255>;
    ac-bias-intrpt = <0>;
    dma-burst-sz = <16>;
    bpp = <32>;
    fdd = <0x80>;
    sync-edge = <0>;
    sync-ctrl = <1>;
    raster-order = <0>;
    fifo-th = <0>;
    };

    display-timings {
    320x240p62 {
    clock-frequency = <6500000>;
    hactive = <320>;
    vactive = <240>;
    hfront-porch = <38>;
    hback-porch = <20>;
    hsync-len = <30>;
    vback-porch = <16>;
    vfront-porch = <4>;
    vsync-len = <3>;
    hsync-active = <0>;
    vsync-active = <0>;
    };
    };
    };

    So, what is affecting in kernel?

    VID_20170522_101619.rar

    Best Regards,

    Rohit Khatri

  • 0 in reply to Rohit Khatri
    TI__Guru**** 393215 points
    This is either the kernel driver reinitializing the LCDC or the memory area of the framebuffer being rewritten. I'm afraid there is no ready solution for this issue. You need to analyze the kernel code to see what is causing this.
  • 0 in reply to Biser Gatchev-XID
    Intellectual 990 points

    LCDC is not re initializing and this care is taken in kernel as we have set flag in HW data file. So, LCDC would not reset.

    We have dumped all LCDC registers in kernel and u-boot. Values of IRQ registers are only different other are identical.

    Best Regards,

    Rohit Khatri