• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 99 subscribers
  • Views 1610 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

XTCIEVMK2LX: How to convert measured time in cycle by TSCH, TSCL to seconds?

Huioon Kim
Intellectual 395 points

Part Number: XTCIEVMK2LX

Hello, experts.

I'm testing an example code from FFTLIB, which contains following lines to measure the time to execute an FFT:

...

clock_t t_start, t_stop, t_overhead, t_opt;

...

t_start = _itoll(TSCH, TSCL);
t_stop  = _itoll(TSCH, TSCL);
t_overhead = t_stop - t_start;

plan_fxns.ecpyRequest = NULL;
plan_fxns.ecpyRelease = NULL;

p = fft_sp_plan_1d_r2c (N, FFT_DIRECT, plan_fxns);
t_start = _itoll(TSCH, TSCL);
fft_execute (p);
t_stop = _itoll(TSCH, TSCL);
fft_destroy_plan (p);
t_opt  = (t_stop - t_start) - t_overhead;

...

So, the t_opt is the total collapsed time for fft_execute(), which shows the cycle number. I want to convert this number to seconds.

As I know, the clock speed of the DSP cores of the SoC is 1GHz or 1.2GHz (which one is correct?), and I simply think dividing the cycle number by the clock speed is the time in seconds. Am I right?

For example, if the cycle is 10,000,000, then the time in seconds is 1s (where the clock speed is 1GHz).

I know this is very basic and easy math, but I want to be sure. I also appreciate if I can get another good method to measure the time consumed by a function or a code block running on the DSP cores.

Thank you!

  • 0
    Guru 13202 points
    Hello!
    1GHz is 1ns per cycle, 1e-9s. Then if you multiply 10,000,000=1e7 by 1e-9s that yields 1e-2s, i.e. 10 millisecond.
    To the best of my knowledge, default values of PLL give you 1GHz speed. Some chips could run 1.2GHz, but you need to program that. In case of 1.2GHz clock speed cycle period would be 0.83ns=8.3e-10s.
    Measuring clock cycles might be good estimation. However, one have to consider possible caching of your data, which may greatly impact your numbers in the second run.
  • 0 in reply to Victor Kazmirenko
    Intellectual 395 points
    I'm sorry, i made a typo. :(

    What I wanted to mean was "if the cycle is 1,000,000,000, then the time in seconds is 1s (where the clock speed is 1GHz)." I missed two zeros. :)
    Anyway, your answer is helpful. I understand that, now.
    Well, I think it would be nice if I can use the value PLL can provide. How can I get the clock speed from PLL? I can see the number when I build a project. I want to calculate the estimated time using the actual clock speed in the program.

    Thank you very much! :)
  • 0 in reply to Huioon Kim
    Guru 13202 points
    Hi again,
    I am not that much familiar with your device, my path was with C6670. I have to tell that processors on evaluation boards all were of 1GHz speed. Later, for production design we purchased 1.2GHz ones.
    First of all I would like to route you to www.ti.com/.../tci6630k2l.pdf, section 9.1.4 System PLL Settings. It will describe multiplier and divider settings for desired frequency. Also pay attention to section 9.2.3.22 Device Speed (DEVSPEED) Register in the same data sheet. There you will read capabilities of your device. If any higher speed available and you decide to change it, then you better look for something like platform_init() function in examples for your board. There you might trace PLL setting sequence. Beware, there might be some hardcoded values, which you might need to change. For that please refer PLL guide for your device.
  • 0 in reply to Victor Kazmirenko
    Intellectual 395 points
    Thank you very much! :)