TMS320C6670: Interrupt routing path

Hi,

Thank you for your response. Good thing you see mistake in my code, so I could find it later too :-)

First of all, I've managed to get interrupt working a little different way. I peeped that in CpIntc help. It looks like

CpIntc.sysInts[36].fxn      = '&edma_isr';
CpIntc.sysInts[36].arg      = 36;
CpIntc.sysInts[36].hostInt  = 2;
CpIntc.sysInts[36].enable   = true;

var eventId = CpIntc.getEventIdMeta(2);
params               = new Hwi.Params;
params.arg           = 2;
params.instance.name = 'edma';
params.eventId       = eventId;
params.enableInt     = 1;
Program.global.hwi11 = Hwi.create(11, CpIntc.dispatch, params);

The difference with previous attempt was that I was trying to attach my ISR to

EventCombiner.events[36].fxn    = '&edma_isr';

i.e. to event combiner of the CorePack INTC, while system event under interest was input to CIC. Though it worked for me, I don't feel myself capable enough to reproduce fro the scratch on my own. I have jumped to C6670 from C41x, that is huge leap, and its hard for me sometimes to catch up.

So once again, I'd like to ask for clarification.

As I understand, one HWI may serve for either one event, or their combination. And it seems to me that depending on the former or latter scheme, the place where ISR is attached is different. If we used just single event to trigger HWI, then we put

var PCIeMSI_hwi_N_Params            =   new Hwi.Params();
PCIeMSI_hwi_N_Params.instance.name  =   "hwi_pcie_N";
PCIeMSI_hwi_N_Params.enableInt      =   false;
PCIeMSI_hwi_N_Params.eventId        =   17;
PCIeMSI_hwi_N_Params.arg            =   0;
PCIeMSI_hwi_N_Params.maskSetting    =   xdc.module("ti.sysbios.interfaces.IHwi").MaskingOption_SELF;
Program.global.hwi_pcie_N           =   Hwi.create(12, "&pcie_isr", PCIeMSI_hwi_N_Params);

i.e. ISR is bound directly to HWI. Also event 17 is CorePack primary event. So I think if we look at Fig. 9-9 in data manual,

interrupt selector chooses its lower input directly from input events bus. Hope this is correct and we can move further.

Suppose, I wish single HWI to serve multiple combined events. Then instead of true ISR, like pcie_isr in the example above, I have to plug kind of dispatcher. Then if we put

EventCombiner.eventGroupHwiNum[0] = 7;
EventCombiner.eventGroupHwiNum[1] = 8;

it will implicitly switch interrupt selector from above figure to its upper input, which in turn is connected to event combiner output. This way events from the input bus EVT[127:4] do not pass through interrupt selector. Instead, if event under consideration has direct connection to EVT[127:4] bus, i.e. is CorePack primary event, event combiner will trigger one of its combined outputs to rise HWI. To let multiple ISR we register event them with event combiner inputs as follows:

EventCombiner.events[31].fxn = '&myEvent31Fxn';
EventCombiner.events[31].arg = 31;
EventCombiner.events[31].unmask = true;

The if event 31 is enabled and, and has its handler, that will be executed as HWI ISR. I hope this correct too. Both event combiner and interrupt selector are part of CorePack's INTC. However, as I see INTC module of CSL, there is no functions to handle above tasks. It looks that right module to use is ti.sysbios.family.c66.tci66xx.CpIntc. Is it correct, that this module handles both CIC and INTC?

In CPINTC module function of particular interest is CSL_CPINTC_mapSystemIntrToChannel. Consider diagram:

As I understand, calling CSL_CPINTC_mapSystemIntrToChannel() makes connection between System Event to Channel, which in C6670 is equivalent to Host Interrupt. In other words we link System Event input to CIC output. My doubt is how this channel/HostInt is related with CorePack's input. Particularly, where number of 114 HostInt comes from? In TMS320C66x DSP CorePac User Guide, Table 9-2 System Event Mapping I see available events mapping, these are ranges 4-8, 10, 15-95, 99, 102-109, 112, 114-115, total 108 if I counted right. Please explain about this mapping.

Thanks in advance.

Well, perhaps I found little hint. In C6670 data manual I see table Table 7-38 System Event Mapping — C66x CorePac Primary Interrupts. And these are fixed event mappings. Among them I see

Event Number  Interrupt  Event Description
56            CIC0_OUT0  Interrupt Controller output
57            CIC0_OUT1  Interrupt Controller output

So I guess, when I map to channel 0 of CIC, it arrives as primary event 56 and so on. Is it correct?

And next, if I want system event, like EDMACC0 to route through CIC, then though Event combiner - how do I achieve that? In CIC I need to map event 36 to 0, which will arrive to CorePack as primary event 56. Next I have to link HWI with combiner output like EventCombiner.eventGroupHwiNum[1] = 8; If so, where do I plug the ISR - at

EventCombiner.events[56].fxn    = '&edma_isr';

or at

CpIntc.sysInts[36].fxn      = '&edma_isr';

Thanks in advance.