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AM3352: McASP Bit clock configuration

Part Number: AM3352

Dear Champs,

My customer connected BT module to AM3352 McASP1 as an input and DAC to AM3352 McASP1 as an output.

I want to check your recommendation who will generate BCLK in this case, and is it ok to generate BCLK in BT module and DAC independently?

i.g. I think BT module generate BCLK and DAC also generate BCLK, and AM3352 McASP1 should just receive BCLK for RX and TX independently. right?

Thanks and Best Regards,

SI.

  • Yes, if they only receive from the BT and only transmit to the DAC, this is possible.
  • SI,

    BT module and DAC generating BCLK independently is not a good design as there is no way clocks generated from 2 sources can be in  sync. You should have one master clock driver in the system who provides the clock to the AM335x McASP and DAC.  The recommendation would be for BT module to generate the BCLK and drive input to AM3352 McASP ACLKR  and the master clock from BT module should connect to McASP highclock (for transmit) and the DAC master clock.

    To simplify, here is the recommended clock structure:

    Hope this helps.

    Regards,

    Rahul