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Interprocessor comunication

Other Parts Discussed in Thread: OMAP3530

Hi

I am looking for the best way to achieve a interprocessor comunication between the OMAP3530 and the LPC1765. I think I'm going to use the SPI bus to implement this, but I have some doubts. The 10Mbps bitrate is OK, but I think that I'm going to need more knowledge about this issue because I will have to change the SPI driver for linux based in OMAP, and write a SPI driver on the LPC. 

Also, I'll have to know very deeply how the DMA and IRQ configuration works, because I think that is neccesary the use of this hardware. 

To conclude, I will to connect both proceesors using the SPI bus, but I am not so sure about the hardware connection and I hope that somebody can help me with this issue.

 

Thanks in advance.

 

Regards!

  • Are you going to use 1 SPI interface or 2?

     

    Use only one interface will work well if you only have uni-directional transfers. Bi-directional transfers will pose more of a problem since one word must be transmitted for every word received.

     

    Using 2 interfaces allows for asynchronous bi-directional transfers at the cost of an additional pair of interfaces.

     

    The TRM is the best place to get detailed information of the McSPI operation (http://focus.ti.com/general/docs/lit/getliterature.tsp?literatureNumber=spruf98i&fileType=pdf).

     

    Another good resource will be the wiki page http://processors.wiki.ti.com/index.php/AM_McSpi

     

    I’ve also attached some low level example code which demonstrates the DMA.

     

      Paul

    MCSPI_DMA_1.zip
  • I am using only one SPI interface due to I've already assign almost all OMAP pins.

    However, I've reserved:

    • 3 port as output from omap to the external int. of the other micro
    • 2 port as input, from the other micro to the imap
    • The UART3 (Tx+Rx) is connected beetween the two micros to allow the omap to save the other micro firmware. Once the firmware was upgraded, the UART keeps unused.

    Despite the fact I can't use 2 spi interface, maybe I would use the others pins/interface to improve the data transfer.

     

  • A single SPI inteface will work but since it operates in a master/slave fashon you will need some method to identify valid data.  While I am no software expert, here are a few of ideas..

    One method would be to implement some type of protocol with with a fixed number of words in each mesage. The message header would identify the the number of valid words. One of the non-spi MICRO output -> OMAP input) could be used to request a transfer.  Downside is that the communication could be inefficient if there are variable sized messages that requrire lots of padding (wasted bandwidth). 

    A variation of the above could be used where the message size is dynamic. The header of the RX and TX messages would identify how many words are to be transferred. The software would then need to pad the smaller of the messages so that both transfers are of equal size.

    Another option would be to use the non spi signals to validate the data in real time. You would pobably still need a signal for the slave a transfer to the master.

    It really is case dependent based on data volume,  direction, etc.

    Paul

  • Thank you Paul,

    I will ask you for more help when I have more advanced the implementation of the hardware and software solution.

    Regards!

    Maxi