This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RTOS/TMS320C6678: SRIO communication between EVMK2H and TMDSEVM6678Lx with CI2EVMBOC ?

Part Number: TMS320C6678

Tool/software: TI-RTOS

Hi Ti gods,

after having given up on using the DFE on XEVMK2L for our project (fast serial communication between FPGA and DSP), we decided to base our project on SRIO, We have now a EVMK2H and TMDSEVM6678Lx, and can successfully run all SRIO examples (Direct I/O and Message Passing) in loopback mode. We are using the latest processor SDK for both EVMs. Before we tackle the FPGA side we want to first be able to communicate between two DSP boards.

We are thinking of ordering the breakout card CI2EVMBOC. Will the two boards be able to communicate with this card, or does one need two identical cards? Both EVMs are supposed to be compatible to CI2EVMBOC.

Another test that we would like to do is use an external loop back.  We modified the SRIO_TputBenchmarking_evmc6678_C66TestProject on the TMDSEVM6678Lx, and set in benchmarking.h

#define SRIO_PORT_WIDTH                   srio_lanes_form_four_1x_ports

#define USE_LOOPBACK_MODE                 FALSE

and connected on the AMC connector RX_P with TX_P and RX_N with TX_N. But the program says that the port is not operational.

What are we doing wrong? Does an external loopback work like that or does one need a SRIO switch? How would one in our case (looback with wires) set the rtwo parameters:

#define IS_BOARD_TO_BOARD                

#define IS_OVER_EXTERNAL_SRIO_SWITCH     

We also unseccesfully tried with the direct I/O example, and set

CSL_SRIO_SetNormalMode(hSrio,0);     
 
 /* Enable Automatic Priority Promotion of response packets. */
CSL_SRIO_EnableAutomaticPriorityPromotion(hSrio);

 /* Set the SRIO Prescalar select to operate in the range of 44.7 to 89.5 */
CSL_SRIO_SetPrescalarSelect (hSrio, 0);

/* Unlock the Boot Configuration Kicker */
 CSL_BootCfgUnlockKicker ();

/* Assuming the link rate is 3125; program the PLL accordingly. */
CSL_BootCfgSetSRIOSERDESConfigPLL (0x229);

 /* Configure the SRIO SERDES Receive Configuration. */
CSL_BootCfgSetSRIOSERDESRxConfig (0, 0x00440495);

 /* Configure the SRIO SERDES Transmit Configuration. */
CSL_BootCfgSetSRIOSERDESTxConfig (0, 0x00180795);

and get stuck in the CSL_SRIO_IsPortOk routine. What are we doing wrong!

Thanks a lot for your help!

Cheers

Doro