• State
  • Locked Locked
  • Replies 7 replies
  • Subscribers 99 subscribers
  • Views 1962 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RTOS/TMDSEVM6678: SRIO DIO Config

dariush karami
Genius 3165 points
Part Number: TMDSEVM6678


Tool/software: TI-RTOS

Hi

In my scenario, I want to send FPGA data by SRIO to L2SRAM of DSP core and after processing the data, DSP returns back data to FPGA by SRIO.

I set " C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects\SRIO_LoopbackDioIsrexampleproject " as my base project.

I know that Maximum payload size of an SRIO packet is 256B. With Direct I/O, one SRIO transaction can support a number of data bytes to Read/Write up to 1MB  by setting LSU_REG3 description.

Q 1:

I can not find where I should set the LSU_REG3? How can I send 1 MB data?

Q 2:

I can not find where I should set the LSU registers? How can I set  LSU registers in the code?

Q3:

Is there any reference or document for SRIO Driver?

Best Regards

  • 0
    TI__Guru**** 161600 points
    Hi,

    I've notified the design team. Their feedback will be posted here.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Mastermind 43296 points
    dariush,

    LSU_REG3 and other LSU registers are configured in SRIO driver function Srio_sockSend_DIO() in pdk_x\packages\ti\drv\srio\src\srio_drv.c. You can refer to dioSocketsWithISR() function to send data with size 1MB or more in application.

    SRIO driver design document SRIO_SDS.pdf is located in pdk_x\packages\ti\drv\srio\docs.

    The latest PDK version 2.0.5 for C6678x is available at software-dl.ti.com/.../index_FDS.html.

    Regards,
    Garrett
  • 0 in reply to Garrett Ding
    Genius 3165 points

    Dear Garret
    Thanks for your answer, according to my previous post.


    Q 1:
    for sending 1MB data I should set SIZE_DIO_PACKET to 1MB ?

    Q 2:
    Is it possible change source address to local L2 SRAM and destination address to MSMC SRAM?

    I want to make a project in loopback mode that Core1 send data to Core0 by SRIO in DIO mode, Core1 send data from its local L2 SRAM to MSMC SRAM for Core0 and Core0 produce interrupt after receiving

    data.

    first:
    I run " C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects\SRIO_LoopbackDioIsrexampleproject " project. This project didn't use Srio_sockRecv() function.

    Second:
    I run "C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects\SRIO_MulticoreLoopbackexampleProject" project and I accomplished some changes:

    I run the project on two cores such that Core1 Send data from its local L2 SRAM to MSMC SRAM for Core0 in DIO mode, But Core0 didn't receive data!!

    Q 1:
    Is it possible to run SRIO in loopback mode in DIO?(I used Srio_sockRecv() function in Core0)

    Q 2:
    what should I do?

    Best Regards

  • 0 in reply to dariush karami
    Genius 3165 points

    Hi

    Please, answer me. I'm waiting.

    I think in DIO operation mode the writer side, write data in memory directly so it is not necessary to use " srio_sockrcv() " function on the receiving side.

    Am I thinking right? if the answer is yes, How can notify the receiving side from received data?

    Regards

  • 0 in reply to dariush karami
    Genius 3165 points

    Please, answer me. Why nobody answers me???

  • 0 in reply to dariush karami
    TI__Mastermind 43296 points

    dariush,


    Yes, SIZE_DIO_PACKET can be set up to 1MB, see LSUx_Reg3

    19-0 Byte_Count 19’h0 Number of data bytes to Read/Write - up to 1MB. (Used in conjunction with RapidIO address to create
    WRSIZE/RDSIZE and WDPTR in RapidIO packet header).
    0x0000 — 1MB
    0x0001 — 1B
    0x0010 — 2B
    …
    0xFFFFF — 1048575B

    You should be able to modify source address to local L2 SRAM and destination address to MSMC SRAM. Note the local L2 SRAM is 512KB per core.

    >>I think in DIO operation mode the writer side, write data in memory directly so it is not necessary to use " srio_sockrcv() " function on the receiving side.

    This is correct.

    >>How can notify the receiving side from received data?

    You can use doorbell to notify remote side, see discussion here:

    Regards, Garrett

  • 0 in reply to Garrett Ding
    Genius 3165 points

    Hi

    Thank you so much for your answers.

    I have a customized board that contained FPGA and DSP. I want to send data from FPGA to DSP by SRIO.
    I want to FPGA write data in DSP memory. After I studied " sprugw1b.pdf " I decided to use DIO and I run
    " C:\ti\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects\SRIO_LoopbackDioIsrexampleproject " examples.

    According to " sprugw1b.pdf " page 63 if packet type is NREAD, NWRITE  ..., the  DSP is in DIO operation mode in
    other words when FPGA send packets including SWRITE,NREAD, NWRITE, DSP received DIO packets.

    Q 1:
    Which field of header in FPGA is responsible  for DSP memory map address?

    I studied " pg007.pdf " in page 168 describe the packet format as below.

    Q 2:
    Which field of frame determine the DSP memory address in the figure 2-11 in " sprugw1b.pdf " as below?

    Q 3:
    Why " WrPtr " is one byte?

    Best  Regards