Tool/software: Linux
Hi,
I want to detect phase difference between external clock and PTP timestamp.
So, the external clock is inputted to GPTimer13 via xref_clk1, which is selected by TIMER_FCLK by CM_L4PER3_TIMER13_CLKCTRL.
PWM parameters of the GPTimer are set to make 8 pulse per sec output to HW1_TS_PUSH and timer13 output pin.
When timer13 pin is observed with xref_clk1 input signal, the rising edge of both signals are almost phase synchronized.
So, I confirmed that the edge of PWM output is triggered by rising edge of the timer clock as described at Figure 22-13 of spruhz6h.pdf
PTP synchronization to external master clock is established by ptp4l in linuxptp project.
Unfortunately, PTP timestamp calculated from the CPTS_REF_CLK counter of HW1_TS_PUSH hardware event seems about 10 usec later than the proper value.
So, I want to confirm why this latency occurs.
Are there any latency from HW_TS_PUSH event to set the counter value for the event ?
If there are any points to confirm my system, please let me know.
Regards,
Tommy
