C6657 PCIE link speed problem

Ramana_Munich

Hi Volks,

I am using C6657 DSP on our custom board and using CCSV7.1. I am testing the throughput of PCIE interface between DSP and FPGA. As the reference clock is 100MHz.i am using the default value 0x1c9(PLLM - 64h) for PCIE_SERDES_CFGPLL.

At the beginning when i use the PCI operationg mode, Gen 1 i am expecting 2.5 GHz PLL output, but getting only 1.2 GHz. when i changed the PCI operating mode Gen1 to Gen2, and i am expecting 5GHz PLL output getting only 2.5 GHz.

do any one have any idea, what can be the reason?

Thanks,

Ram.

over 8 years ago

0 Yordan Kovachev over 8 years ago

TI__Guru**** 161600 points

Hi,

I've notified the factory team. Their feedback will be posted here.

Best Regards,
Yordan

0 lding over 8 years ago in reply to Yordan Kovachev

TI__Guru* 95265 points

Hi,

Yes, with 100MHz reference clock, 0x262_0358 should be programed into 0x1c9. This is the default setting and is also used in our Processor SDK RTOS software for Keystone I PCIE interface.

BIT 7-1 is Multiplier, 110,0100 = 0x64, this is 25 times from Table 2-2 of PCIE UG. 100MHz*25=2.5GHz. I am not sure why you only measured 1.2GHz, I looped in our HW expert.

Regards, Eric

0 Ramana_Munich over 8 years ago in reply to lding

Expert 1660 points

Hi,
ya principally what you said is right. i am measuring only 1.25GHz, which is actually half of the speed what we expected.

Thanks, Ram

0 Tom Johnson 16214 over 8 years ago in reply to lding

TI__Mastermind 46460 points

Ramana,

Are you using the ProcSDK code provided? You should be able to obtain nominally correct operation using the examples provided since you are using a 100MHz reference clock.

The frequencies listed are not expected. Are you sure that the oscilloscope is set up correctly? Often when capturing gigabit clock signals and data signals that are repetitive, Digital Sampling Oscilloscopes will alias and display signals that are not correct.

Have you reviewed the following documents for additional understanding:

PCIe Use Cases for KeyStone Devices Application Report (SPRABK8) at http://www.ti.com/lit/an/sprabk8/sprabk8.pdf.

PCI Express (PCIe) FAQ for KeyStone Devices Application Report (SPRAC59A) at http://www.ti.com/lit/an/sprac59a/sprac59a.pdf.

Tom

0 Ramana_Munich over 8 years ago in reply to Tom Johnson 16214

Expert 1660 points

Hi Tom,

Measured again. works now.

Thanks,

Ram.

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C6657 PCIE link speed problem