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AM5728: TRSTn pin

Part Number: AM5728


Hi,

I have simple question regarding "trstn" input pin of AM5728.

As you know, this pin is used for the initialization of TAP controller.

If this pin is tied to High (and also TCLK is tied to high), how does AM5728 influence?

Please let me know.

I appreciate your quick reply.

Best regards,

Michi

  • Hi,

    This is explained in section 7.27.1 of the AM572x Datasheet SR2.0 Rev. B:

    "The trstn pin only needs to be released when it is necessary to use a JTAG controller to debug the device or exercise the device's boundary scan
    functionality. For maximum reliability, the device includes an internal Pulldown (IPD) on the trstn pin to ensure that trstn is always asserted upon power up and the device's internal emulation logic is always properly initialized. JTAG controllers from Texas Instruments actively drive trstn high. However, some third-party JTAG controllers may not drive trstn high but expect the use of a pullup resistor on trstn. When using this type of JTAG controller, assert trstn to initialize the device after powerup and externally drive trstn high before attempting any emulation or boundary-scan operations."
  • Dear Biser-san,

    Thank you for your reply.

    I understood JTAG controller of AM5728 drive trstn to high. But my customer would like to know its timing when trstn is driven to high.
    Is ti same timing when 3.3V power supply is rising up? Or Does trstn drive to low once, after that, trstn is driver to high?
    Please let me know.

    I appreciate your continuous support.

    Best regards,
    Michi
  • Your understanding is wrong. AM572x does not have a JTAG controller. What is meant by a JTAG controller in the explanation above, is an external device that drives TRSTn. The datasheet clearly states:

    AM572x device includes an internal Pulldown (IPD) on the trstn pin to ensure that trstn is always asserted upon power up and the device's internal emulation logic is always properly initialized.

    If you read further on:

    However, some third-party JTAG controllers may not drive trstn high but expect the use of a pullup resistor on trstn. When using this type of JTAG controller, assert trstn to initialize the device after powerup and externally drive trstn high before attempting any emulation or boundary-scan operations.

    This means that TRSTn must be always in low state, except when driven high for JTAG accesses.
  • Dear Biser-san,

    Thank you for your cooperation.

    I understood AM572x does not have a JTAG controller. And TRSTn is low when device power up by internal pull-down.
    In case a JTAG controller is connected to the AM572x, if TRSTn goes to High by JTAG controller, AM572x (AM572x runs at normal operation) enters to emulation mode at once? Or for emulation mode, do any signals need to change?

    Please let me know.

    I appreciate your quick reply.

    Best regards,
    Michi
  • Driving TRSTn high will release the internal debug subsystem from reset. From there on the standard JTAG signaling will control the debug subsystem.
  • Dear Biser-san,

    Thank you for your quick reply. It is very helpful for me.

    Please let me ask one more question.

    According to the data manula of AM572x, trstn is assigned to D20 pin, and buffer type is "Dual voltage LVCMOS". In Table 5-17. Dual Voltage LVCMOS DC Electrical Characteristics(3.3-V Mode),
    VIH : min. 2V
    VIL : max. 0.8V

    If this trstn level is always 0.8V-1.3V from device power on, what is happened? Is it possible to happen any troubles?

    Please advise me again.

    Best regards,
    Michi
  • TRSTn IO cell is powered from VDDSHV3. I suppose you have an external pullup to VDDSHV3, that forms a resistive divider with the internal pulldown if the TRSTn pin. Is this correct? If so, what is the external pullup value?
  • Dear Biser-san,

    Thank you for your quick reply.

    This is customer's situation. I must confirm this to my customer. But I think no external pullup resistor.

    Best regards,

    Michi

  • Dear Biser-san,

    Thank you for your continuous support.

    My customer executed one test in AM5728 system.

    Customer tied "trstn" to 3.3V(High). And Powered AM5728 up.
    TCLK: N.C.
    TMS: tied to 3.3V via external resister
    TDI: tied to 3.3V via external resister

    As a result of test, Am5728 runs in normal operation, not debug mode.

    Customer would like to know why AM5728 does not enter to the debug mode with "trstn" High.

    The below is my thinking.

    1) When AM5728 power up, "trstn" always is asserted. And internal emulation logic is initialized.
    2) "trstn" input feature is never enabled until the initialization of the emulation logic is completed.
    3) According to the "IEEE Std 1149.1-2001 specifiction", it is described as the below.
    ---------------------------------
    4.6.1 d) To ensure deterministic operation of the test logic, TMS should be held at 1 while the signal applied at TRST* changes from 0 to 1.

    Recommendation 4.6.1 d) is included to ensure that the test logic responds predictably when the signal
    applied to TRST* changes from 0 to 1. If rising edges occur simultaneously at TRST* and TCK when a
    logic 0 is applied to TMS, a race will occur, and the TAP controller may either remain in the Test-Logic-
    Reset controller state or enter the Run-Test/Idle controller state.
    -------------------------------------
    4) So I think that the rising edge of "trstn" is needed to enter the debug mode. But, in case of the above test, "trstn" always high. the transition of 0 to 1 never happened.
    5)For this reason, AM5728 runs in normal operation.
    6) Maybe TCK is needed to enter the debug mode with release trstn?

    Is my thinking right?

    Please advise me again.

    I appreciate your quick reply.

    Best regards,
    Michi
  • Yes, this is correct.