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TDA2SX: What are reset when RESETN pin is asserted?

user1894496
Prodigy 90 points
Part Number: TDA2SX

Hello,

We are using TDA2SXBTQABCRQ1 evaluation board to do our  development. I want to know when the RESETN (BALL NUMBER is E23) pin of clock interface is asserted, what are reset (e.g., regarding registers, output signals) during the reset process?

  • 0
    TI__Mastermind 42515 points
    Hi,

    I have forwarded your question to an expert for comment.

    Regards,
    Yordan
  • 0
    TI__Mastermind 19320 points

    Hi,

    RESETN asserts internal warm reset. Warm resets consider device has undergone a power-up sequence and some parts of the chip may not need to be reset. Run a search in the TRM for "warm reset insensitive" or similar to see which registers are unaffected. From software perspective, warm reset is not much different than cold reset, except for reset isolated modules (currently only ethernet switch).

    This is in theory,. In practice your chip might be affected by a bug and EVM is designed so warm resets always cause POR reset for 100% reliable reset.

    You can check this by measuring the POR signal coming from the PMIC while you are initiating warm reset.

    Regards,

    Stan