Part Number: TMS320C6748
Other Parts Discussed in Thread: OMAPL138
Dear Forum
Im searcing on web some schematic showing C6748 (or similar ) connect to some FPGA, but i did not find. Probably because is very simple.
Data goes from FPGA to DSP, 16 bit wide
So, question are:
- Connectios we need is only uPP_D[0] - uPP_D[15] + EN-START-CLK-WAIT ?
- uPP_2xTXCLK not necessary.Correct ?
-If CPU clk IS 375MHZ, uPP_CLK could be max 375/4 =93 MHZ ,and so we coud reach maximum 93 Mword /sec . (1 word=16 bit) Is correct ?
Any other advice is apreciate.
Thanks for your time
Roberto
