AM4378: Issues booting from MMC0 interface

Yes, this is a custom board, but we based the design on the AM437x GP EVM.  I've attached scope shots from our custom board and the AM437x GP EVM showing the MMC0_CLK and MMC0_CMD signals during startup.  It appears that the initialization happens the same on both boards but on our custom board nothing happens after that, as compared to the AM437x GP EVM you can see the CLK and CMD signals continue after the initialization.

AM437x GP EVM Startup

Custom Board startup

Here is what the schematic looks like for the microSD connector to the processor;

Here are scope shots that show all data lines;

AM437x GP_EVM startup

Custom Board Startup

Brian,

I have a couple of questions to baseline understanding of your board setup.

What is your SYSBOOT configuration?

What reference clock frequency is used?

Thank you.  Just to clarify, your SYSBOOT configuration is below?

SYSBOOT[17] = ?
SYSBOOT[16] = don't care
SYSBOOT[15:14] = 01
SYSBOOT[13:12] = 00
SYSBOOT[11:5] = don't care
SYSBOOT[4:0] = 01100

If you zoom into the logic analyzer traces of the MMC0 activity, are you seeing responses from the memory card to the CMD1 command from the AM437x or CMD55+ACMD41 command from the AM437x?

Did the original burst of activity on the MMC0 interface actually last longer on your target hardware than on the EVM?  From the logic analyzer trace plot, it appeared to be a little longer (ie. more transactions), but it wasn't clear and I don't want to make assumptions.

Here is a screenshot of the SYSBOOT config, I just took a screen shot from the datasheet and highlighted the configuration.

I can try and get some more scope shots of the responses, but as memory serves me I recall that we were getting the same responses during the initialization on the dev kit or on our custom board.  The initial interactions were taking place at maybe 300kHz or so, then the clock speed increased to 12MHz.  Following that is when our custom board no longer has interaction, on the dev kit it continues to read, and I think the clock speed increased again at this point to 50MHz. 

Adding some more information in regards to the MMC0 interface signals on the custom board.  The MMC0_CLK begins (the first three 'packets' in the image) at 250kHz, when the MMC0 interface starts transmitting data on MMC0_CMD the clock frequency changes to 200kHz.

below is the first message transmitted on the MMC0_CMD line, there is no response to this message;

The next message on the MMC0_CMD line does get a response, the data is in the image;

Message 3 on the MMC0_CMD line looks to be CMD55, and there appears to be a response;

Message 4 on MMC0_CMD is the ACMD41 message, it looks like there is a response to this as well;

It appears that then a series of CMD55...ACMD41...CMD55...ACMD41 continues between the processor and the microSD card.  The last message on the MMC0_CMD line prior to changing clock speed from 200kHz to 12MHz is CMD9, asking for card specific data, to which it appears the card responds.

The processor then sends CMD4 on the MMC0_CMD line, then changes the clock speed;

If you are seeing the MMC0 clock speed jump up to 12MHz, this should be indicative of the MLO (first kernel copied from SD Card to internal memory by ROM code) taking over and executing.  The ROM code (aka. boot ROM) reads the MMC interface in 1-bit mode and slowest clock speed to accommodate various memories.  This MLO then reconfigures the clocks to support reading u-boot out of the SD Card at a faster rate.  The MLO is executing out of internal memory.

Is there any data coming out of the UART during this time?

If the DDR timing or any of the clock configuration is off, then you may not see any output on the UART.  If data is coming out of the UART, I would look at DDR timings.

Not to confuse things, but MLO is the filename the ROM code looks for in the FAT filesystem for the SD Card.  It is a rename of SPL, which is Secondary Program Loader.

http://processors.wiki.ti.com/index.php/The_Boot_Process

One thing I was wondering if it could be causing our issues, on the development kit the DDR3 memory is MT41K512M8RH-125, which is 800MHz clock rate.  Unfortunately that DDR3 memory is obsolete and the manufacturer suggested alternate part is MT41K512M8DA-107 which is 933MHz clock rate.  Is the AM4378 processor compatible with 933MHz clock rate DDR3 memory?

MMC0_CLK signal on our custom board when running at 12MHz.

Here is the MMC0_CLK signal on the development kit.

OK, i don't see any evidence of reflections, so I don't think that is the issue.  Can you connect JTAG after booting up the board and see where the program counter (PC) is?  If it is somewhere in 0x30000-0x40000, then it is still executing ROM.  If it is in 0x40300000 or higher, then it is in MLO or u-boot.  Once we narrow that down, we can continue to debug.  Try this experiment several times to ensure consistent results.

Regards,

James

I have been able to get the JTAG connected to the processor but how do I view the program counter?

We ran the debugger on our custom board and paused operation and the program counter was at 0x0000000C. It never got any higher than this. It is getting stuck at this value when I do a system reset from within the debugger.  If I disconnect from the target and reconnect then it it goes to the higher value below.

We must have had something in the setup wrong when we did this as upon further testing the program counter is getting to 0x402F4500 consistently.

We're trying to update the appropriate registers based on our new DDR memory and we are struggling to get all of the proper values loaded.  We are using the attached spreadsheet as a guide for finding the values we need to load per this guide http://www.ti.com/lit/an/sprac70/sprac70.pdf.  Any guidance or assistance in getting these values correct would be greatly appreciated.  Also, how can we generate our own GEL file?

DDR datasheet

1586.4Gb_DDR3L.pdf

Parameter Spreadsheet

SPRAC70_AM437x_EMIF_Configuration_Tool_V20.xlsx