When the RESETN (BALL NUMBER is E23) pin of clock interface keep active, what is state of QSPI I/O port(input or output)?
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When the RESETN (BALL NUMBER is E23) pin of clock interface keep active, what is state of QSPI I/O port(input or output)?
Hi,
It is a little odd to me saying RESETN is a "pin of clock interface". I don't know what it should mean. It's not a problem though.
Regarding your question - all QSPI pins will be HiZ with weak pull-downs, except for CS0 and CS1, which are HiZ with pull-ups during POR or warm reset.
That are data from TDA2x Data Manual document.