Hi,
We plan to operate the McASP in I2S mode with single serializer (configured in Receiver mode). In this context, we would like to understand if there is any limitation of (AFSR) Frame Sync frequency. The bit clock would be in the range of 20Mhz to 27Mhz (< 50MHz which is the specified maximum range).
I believe since there is no limit mentioned in the datasheet, the frame sync frequency can be as HIGH as say ~850KHz. (Ex settings: ACLKR: 27MHz, #of slots: 2, slot/word size:2 bytes). Please confirm.
Regards,
Shareef
