• State TI Thinks Resolved
  • Locked Locked
  • Replies 1 reply
  • Answers 1 answer
  • Subscribers 100 subscribers
  • Views 722 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM3352: GP EVM NOR flash

Kummi
Mastermind 6220 points
Part Number: AM3352

Hi,

With regards to AM335x EVM NOR flash.
The EVM schematics shows that "DQ15" pin of NOR Flash is connected to
A0(NOR_A0) pin of GPMC. Could you please let us know what is the
reason that DQ15 is connected to A0. As per the TRM, A0 pin should not be
used with 16 bit NOR flash.



Best Regards
Kummi

  • 0
    TI__Guru**** 393215 points
    Hi,

    Note that the NOR is wired for 8-bit access (BYTEn pin tied to GND). On M29W128G DQ15 description is as follows: When the device operates in x16 bus mode, this pin behaves as data I/O, together with DQ[14:8]. When the device operates in x8 bus mode, this pin behaves as the least significant bit of the address.