This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Regarding use of a 24-bit SPI EEPROM with the new C5505 and C5515 devices.

Other Parts Discussed in Thread: TMS320C5505, TMS320VC5505

Good day,

We kindly request confirmation from TI that in using the new DSP devices, namley the TMS320C5505, we will no longer be limited to a 16-bit addressable EEPROM As currently with the TMS320VC5505s.

We are revising our PCB to make use of the new devices as recommended by TI, and also partly because the previous devices TMS320VC5505 are no longer available. Our code exceeds already the 64Kbytes SPI EEPROM previously permited by the VC5505 bootloader, and for this reason (plus other enhancements and availability issues), we require to make the change to the C5505 devices in our design.

According to the app note on page 4 SPRABD7–June 2010 :

2.2.4 24-Bit SPI Serial Flash

The bootloader supports booting from an SPI Flash with the following requirements for the external

device.

The device must support at least a 500 kHz SPI clock.

The device must be connected to SPI CS0 and act as an SPI slave.

The device uses 3 bytes (24 bits) for internal addressing (up to 16MB).

The device must have the capability to auto-increment its internal address counter to allow sequential

reads from the device.

The device can be connected to either valid pin-mapping for SPI (there are two distinct pin-mappings

available). The bootloader attempts to communicate on each SPI pin-mapping, one at a time.

Any and all write-protect features must be disabled if re-authoring is needed. The bootloader will not

attempt to disable these features.

 

However I will kindly request this to be confirmed by TI so as to trully put this difference between the VC5505 and C5505s, completely to rest.

Thanks in advance.

Regards, M MARIN