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AM3352: Clock and control signal transition behavior

Shareef
Expert 1985 points

Part Number: AM3352

Hi,

Need some help from HW Experts from TI on the the AM3352 datasheet section 5.2 Recommended Clock and Control Signal Transition Behavior. This section specifies the clock and control signal must transition between VIH and VIL (or between VIL and VIH) in a monotonic manner.

1. I believe this constraint is being specified to avoid double clocking or triggering of the data if the non-monotonic portion of the clock/control signal goes closer to VIH or VIL...Is this right?

2. If there is a sufficient noise margin from the non-monotonic portion of the waveform from VIH and VIL (>300mV or so), can this recommendation be safely ignored?

If the above understanding is not fully correct, can you please provide the possible reasoning for this recommendation..

Regards,

Shareef