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HPI Chip Select Signal

Hi All,

Datasheet clarification required regarding Host Peripheral Interface HCS signal (multiplexed mode). Some timing diagrams in spru620d show HCS asserted for an entire multiplexed data transfer. Other timing diagrams show it being 'optionally' deasserted between access to high/low bytes. We need confirmation that it is OK to deassert the HCS in between the high/low bytes as this will determine if we need to add glue logic to our design

Cheers

Andy

  • Andy,

    HCS must be low for the HPI module to be selected. As shown in Figure 5, HCS, HDS1, and HDS2 work together to generate the internal HPI strobe (HSTRB) that is used to strobe data accesses for the HPI module. Thus, HCS must be low during data accesses, but can remain low or go high between accesses. When HCS is high, activity on HDS is ignored and data accesses cannot occur.

     

    Best regards,

      Pedro