• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Subscribers 99 subscribers
  • Views 947 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

66AK2G02: crystal load capacitance equations

Brian Antheunisse
Expert 5305 points
Part Number: 66AK2G02


Hi guys,

I tried to comment on an existing post, but I think I should open a new one to make sure it gets assigned some attention.

Can you guys make a comment on the discrepancy between the datasheet equations and the EVMs as described in the below post? My customer is trying to finalize their design...

e2e.ti.com/.../593732

Thanks!

Brian

  • 0
    TI__Guru 65405 points
    Hi Brian,

    I've forwarded this to the design experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Mastermind 42545 points

    Hi Brian,

    There were a couple of factors that led to the values selected. As is true for most EVMs, the boards were designed before the final documentation was available. This dictated the selection of the crystal due to the footprint used on the PCB. The equation in the data sheet gives the ideal value for CL based on the load for the crystal installed.  Table 5-5 specified the max value for CL as 24pF.  We chose values as close to the calculated value as possible without exceeding the CL max spec.

    Regards,

    Bill

  • 0 in reply to Bill Taboada
    TI__Expert 5305 points

    So I guess you are saying to go ahead and trust the datasheet equations as highest priority. Can you confirm the following two statements are true?:

    1. The CL spec in Table 5-5 is not talking about the crystal load capacitance, it is a repeat spec defining Cf1 and Cf2 just like Table 5-13.

    2. If you are using equation in Figure 5-7 and the Cf1 and Cf2 spec in Table 5-13, then:

    Plugging in Cf1/Cf2 min 12pF to equation results in 6pF crystal load capacitance

    Plugging in Cf1/Cf2 max 24pF to equation results in 12pF crystal load capacitance

    Therefore the crystal on EVM is technically out of spec and we need to stick to crystals with load capacitance between 6pF-12pF

    Thanks,

    Brian

  • 0 in reply to Brian Antheunisse
    TI__Mastermind 42545 points

    Hi Brian,

    That is correct, table 5-5 is specifying the limits for Cf1 and Cf2.  I'll check with the data manual owner to see if this should be consolidated. The crystal is out of spec although the formula should also include the stray capacitance associated with the PCB layout. (CL = (C1 * C2) / (C1 + C2) + Cstray). Generally the stray capacitance is fairly low in value. This would shift your range up slightly.

    Regards,

    Bill