TSIF in DM6467

Apologies for the delayed response.  I am afraid TSIF will not create the transport stream for you (PCR generation, SI/PSI tables...); this is normally done by very expensive head-end equipment.  I suppose transport stream can also be assembled in software depending on the number is transport streams and the CPU bandwidth and then TSIF can be used to output the transport stream via serial or parallel interface.  What TSIF can do is check for time-stamp (ATS checkers) and parse transport streams via its 7 PID filters.  We do provide a TSIF Linux driver along with documentation and the drivers's capabilities as part of our DVSDK.

I hope this helps; but please let us know if there is anything else we can assist you with.

Thanks for your response.

I've just seen the TSIF WebEx presentation  and I think I didn't get the TSIF output idea yet.

Does it simply work as a serial (or parallel) interface to output a ready made TS?

I'll look for the linux driver in the DVSDK.

Thank you.

R Tovo said:

Does it simply work as a serial (or parallel) interface to output a ready made TS?

I believe this is mostly true; TSIF does provide an ATS checker for output streams, but most the work of putting the TS stream together will have to be done outside TSIF.

TSIF supports output in two modes.  1. TS and 2. NONTS.

In NON TS, ATS checker can be enabled or disabled. Packet sizes supported are 200 to 256 (In steps of 8). ATS can not be ebabled for 256 bytes packet  as the max buffer size is 256...

IN case of TS, TS output can be done only with ATS. As Juan Gonzales pointed out, TS can output can be serial or parallel TS streams but there is no mux support available in the hardware....

Regards,

Nageswari.S

Ok, it answers my question.

Thank you all, Juan and Nageswari for the answers.

P.S.: I'm glad Nageswari itself joined the forum to answer this question. [:)] Thank you.

Hi,

       I am working to TSIF on DM6467 board. I am trying to run the TSIF0 as serial transmitter ( in syncronous mode).  To verify the content what i am transmitting, i connected TSIF0 out to TSIF0 in.  The TSIF0 serial output is running in TS mode. I am able to transfer the complete file over TSIF interface ( application takes care of ATS value), but i am not able to receive the complete file in receiver.  Does anyone has any sample application which does a loopback of TSIF in TS mode to verify the transfer is correct. Does anyone tell me what is the role of subtraction pointer when we are using TSIF in receive mode.

Thanks  in Advance

Shantanu Bhaduri

Shantanu,

Are you using TSIF daughter cards and DM6467 EVM for testing the TSIF0 interface. There is a small board modification required in the TSIF daughter card to test serial synchronous interface on TSIF0. You can test TSIF1 serial interface or TSIF0 parallel interface...

There is a sample application in LSP1.30 release package for TSIF0 parallel loop back. This can be changed easily to support TSIF1 serial loopback...

Also, file size received will always be multiple of 192 bytes. (If ATS is enabled) .

Regarding subtraction pointer,

Subtraction pointer in TSIF ring buffer is used as a watermark for the ring buffer.

If write pointer address reaches to the address which can be defined by subtraction of this register value from read pointer address, an interrupt pulse is asserted to ARM processor with status flag (INT_CTRL[8]).

In linux driver, subtraction pointer is configured to 1/3rd of the ring buffer size.

Regards,

Nageswari.S

Hi Nageswari,

          Thanks for the response. Actually we have a custom board on which we are verifying the TSIF interface.  Actually i tried using the sample application , but it didn't work directly ( as the ATS value was not given properly , so transmitter was not working).  Actually i have enabled some driver print to verify TSIF register status. When i wait for receive interrupt completion, the interrupt should come when difference between read and write pointer is equal to value specified by subtraction pointer. so , when i get an interrupt i see the read and write pointer are at the same location ( which means interrupt came when read = write). Beacuse of this DMA is stalled and i saw in the driver that in the isr the read pointer is moved to the next buffer start address which will againg start the DMA. Beacause DMA is stalled, the TSIF will drop some packets and i am seeing the file size doesn't match. My suspision is on the test application , but i am not able to identify the problem . Any help on this will be really helpful.

Thanks

Shantanu Bhaduri

Hi,

Are you changing any buffer sizes in your application.

Please refer to the TSIF presentation at

https://sps05.itg.ti.com/sites/tiisw/bu/pspproducts/Presentations/Forms/AllItems.aspx?RootFolder=%2fsites%2ftiisw%2fbu%2fpspproducts%2fPresentations%2fDM646x%20PSP%20WebEX%20Presentations%20for%20FAE%27s%2ftsif%5fdriver%5fpresentation%2fpresentations&FolderCTID=&View=%7b5555A654%2d820B%2d484A%2dA5B5%2dE3FCF1C78D3F%7d

This has the details of buffer management in TSIF....

If your application is not able to read data fast enough, try changing your ring size. Ring size should always be a multiple of 192 bytes and divisible by 3.

Ex - 22*192*3

Regards,

Nageswari.S

Hi,

Sorry...

The site I have mentioned above is internal TI site and may not be available external to TI.

Please refer to the following site for presentation

http://wiki.davincidsp.com/index.php?title=DM6467_PSP_WebEx_Presentations

Regards,

Nageswari.S

Hi Nageshwari,

              The TI sample application configures the buffer size as 22*192*3 , which i had retained. But the issue is the same.  I tried varying the buffer sizes ( keeping in mind that it should be multiple of 3 and 192), but i have seen the same issue.  I was wondering even if application is not able to read the buffers fast enough , the hardware should still give interrupts at intervals defined by subtractor pointer.   

Regards,

Shantanu Bhaduri

Hi Shantanu,

How are you checking the read/write pointers.

Are you using "TSIF_GET_RX_BUF_STATUS " ioctl for getting the status.

TSIF receive interrupt will be generated when absolute value of (RP-WP) is equal to subtraction pointer. But RP is again moved by 1/3 buffer size in the interrupt context. Also, please ensure that you are printing

the Receive buffer 7 (bypass mode) buffer pointers for comparison...

Can you send me the log of your prints...

Another easy way to check the setup is to transmit only one ring buffer size data initially and make sure the eomplete packet is received. (22*3*192 bytes only).

Regards,

Nageswari.S

Hi Nageshwari,

                              I am using the TSIF_GET_RX_BUF_STATUS to check how many bytes are received by TSIF receive port .  The Log i have copied below ( this gives the print as the interuupt number, read buffer pointer and write buffer pointer)

 Interrupt = 1
 Read Pointer = 0x8503e100
 Write Pointer = 0x8503e100
 Interrupt = 2
 Read Pointer = 0x8503c000
 Write Pointer = 0x8503c000
 Interrupt = 3
 Read Pointer = 0x8503d080
 Write Pointer = 0x8503d080
 Interrupt = 4
 Read Pointer = 0x8503e100
 Write Pointer = 0x8503e100
 Interrupt = 5
 Read Pointer = 0x8503c000
 Write Pointer = 0x8503e7c0

So always i see whenever interrupt comes , the read and write pointer is at the same location. I have one more interesting observation , my application seems to receive TSIF packet only with Ring buffer 7 and not with any other ring buffers. Is it like when we work in bypass mode we have only ring buffer 7 ?

Regards,

Shantanu Bhaduri

Hi,

In bypass mode, only RING Buffer 7 is available. Ring buffer 0 to 6 are enabled only when PID filtering is enabled...

Can you also send me the complete log of start address, end address and subtraction pointer from GET_RX_BUF_STATUS ioctl and also your application.

Regards,

Nageswari.S

Hi Nageshwari,

                             Please find the log below as you have suggested. The GET_RX_BUF_STATUS  is called after every TSIF_WAIT_FOR_RX_COMPLETE ioctl. Hope this helps.

start
 loop
 <tsif_data.ko>Interrupt = 1
 <tsif_data.ko>Read = 0x86eb6580
 <tsif_data.ko>Write = 0x86eb5ec0
 <tsif_data.ko>Interrupt = 2
 <tsif_data.ko>Read = 0x86eb4000
 <tsif_data.ko>Write = 0x86eb7180
 <tsif_data.ko>Interrupt = 3
 <tsif_data.ko>Read = 0x86eb52c0
 <tsif_data.ko>Write = 0x86eb4c00
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 <tsif_data.ko>Interrupt = 4
 <tsif_data.ko>Read = 0x86eb6580
 <tsif_data.ko>Write = 0x86eb6400

 END Addr    = 0x86eb7840
 <tsif_data.ko>Interrupt = 5
 <tsif_data.ko>Read = 0x86eb4000
 <tsif_data.ko>Write = 0x86eb7000
 
 Write Addr  = 0x86eb6580
 <tsif_data.ko>Interrupt = 6
 <tsif_data.ko>Read = 0x86eb52c0
 <tsif_data.ko>Write = 0x86eb5200

 Read  Addr  = 0x86eb5140
 <tsif_data.ko>Interrupt = 7
 <tsif_data.ko>Read = 0x86eb6580
 <tsif_data.ko>Write = 0x86eb6580
 
 Sub   = 0x12b8
 <tsif_data.ko>Interrupt = 8
 <tsif_data.ko>Read = 0x86eb4000
 <tsif_data.ko>Write = 0x86eb7240
 
TSIF RX: bytes left = 9216
 <tsif_data.ko>Interrupt = 9
 <tsif_data.ko> Read = 0x86eb52c0
 <tsif_data.ko>Write = 0x86eb4f00
 <tsif_data.ko>Interrupt = 10
 <tsif_data.ko>Read = 0x86eb6580
 <tsif_data.ko>Write = 0x86eb61c0
 
 read count = 1
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 2
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 3
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 4
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 5
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 6
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 7
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 8
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 9
read = 4700
 TSIF_GET_RX_BUF_STATUS
 START Addr  = 0x86eb4000
 END Addr    = 0x86eb7840
 Write Addr  = 0x86eb4000
 Read  Addr  = 0x86eb61c0
 Sub   = 0x12b8
TSIF RX: bytes left = 8640
 read count = 10
read = 4700

Regards,

Shantanu Bhaduri

Hi,

As per your log, I cannot find RP and WP match. Also, for every interrupt, you need to read /consume 1/3rd ring buffer size. i.e 25*192 bytes.... (Irrespective of whether ATS is enabled or not) But, you seem to consuming only 4700 bytes.(188*25)

This could be the reason for missing some bytes...

Can you try reading 4800 bytes for every interrupt.

Regards,

Nageswari.S

What are these board modifications?

I would like to use the TsifLoopback application, modified to TSIF1 output serial sync -> TSIF0 Input. 

But the problem is: I don't have access to TS0_CLKIN in the daughter card expander (DC_P2). How to do that?

Thanks.

Any help. Please.

Hi,

To get TSIF0 serial mode working with the DM6467 EVM, you need to do following modification in the TSIF daughter card....

R413 and R406 have to shorted. They are currently open in the DC board...

Regards,

Nageswari.S

Hi,

I have been using TSIF on DM6467 EVM in loopback mode. I have two sample apps. One, which transfers TS packets in batch of 200 packets. The other one, which I run in background is the receive sample app where I receive in batch of 500 packets. However, I observe that in each batch of 200 TS packet transfer I loose 2 packets at the receive side. The original input TS file size and file size at the receive side are not same. Has anybody observed this ? Is this some kind of issue in the driver ? 

Thanks and Regards

Sanjay

I cannot say I have done much work with TSIF, but I would check the RCV_PKT_ERR_STATUS bit to ensure no errors were reported.

I found the issue of 2 packet loss in every transfer. I need to set the write avail to (actual number of bytes to transfer + 2 * 188) . Because Pointers are updated when the DMA is done from DDR to TSIF ping-pong buffer and not when the actual data goes out in the wire.

Hi Nageswari.S,

We have fabricated our own TSIF daughter boards. I would like to understand whether the LVDS driver need to be present between TSIF0 and TSIF1 before we loop them back in serial mode.

Are there any implications we need to consider before we loop back TSIF0 and TSIF1 without any LVDS driver chip.

Thanks in advance

Sushant

Hi Sushant,

I am not a hardware engineer so I am just sharing my under standing. LVDS daughter card was made for DM6467 EVM because commerical available MPEG2 TS streamers were having mostly LVDS connectors. Also, I believe LVDS helps at such high data rates when you go serial. So, depending on use-case, you need to decide on whether to go for LVDS driver.

TSIF0 and TSIF1 module can be looped back externally without LVDS conenctor but I am not very sure of signal integrity at hgher data rates...

You need to contact some hardware engineer in TI for this.

Regards,

Nageswari.S

Hello all:

  I am being puzzled with the TS interface a few days,I want to test the parallel,synchronous,and input model of TSIF0,I am not sure whether I only need  the following eleven pins or need some more?

1.TS0_CLKIN(TSIF0 receive clock input )

2.TS0_EN_WAITO(date enable)

3.TS0_PSTIN(packet start)

 4.TSDIN0——TSDIN7(data)

The TSIF interface is on DC_P2 connector on DM6467 , I want to test the parallel,synchronous,and input model of TSIF0, I haved designed a TSIF connector in order to connect the TSIF interface on DC_P2 to another board(a board has the function as TS analyzer),and there only eleven pins:

1.TS0_CLKIN(TSIF0 receive clock input )

2.TS0_EN_WAITO(date enable)

3.TS0_PSTIN(packet start)

 4.TSDIN0——TSDIN7(data)

 The above is my hardware,and I install the TSIF driver,compile the application (saTsifUserPtrBuffer and so on),and I use oscilloscope to measure the above eleven pins,all normal,so The TSIF source is right,it can produce the right TS signal.

But when I execute the application: ./saTsifUserPtrBuffer 60000 60000 60000 60000 ,it only turns out  the followings information:

 -------------------Send the Data from the MPEG2 TS Analyzer

I found it can't execute the irqreturn_t tsif_isr(int irq, void *dev_id, struct pt_regs *regs) function, so it can't produce interrupt. The application I have changed some, although I only configure it BYPASS model to receive any packets ,still can't produce interrupt.

Anyone encounter the above question? If some problem is related to my HardWare ?but I think the parallel,synchronous,and input model of TSIF0 only 11 pins,am I right?

Thanks everyone!

Hi,

The saTsifUserPtrBuffer application expects the TS data to be streamed from an external source. Also the application is expecting certain PIDs to be present in the stream which is being sent/received. If you are using a different stream then you need to modify the application accordingly.

Regards, Sudhakar

 hello Sudhakar :

 Thanks for your reply, I test the parallel,synchronous,and input model of TSIF0, I am not sure whether I only need  the following eleven pins or need some more?

1.TS0_CLKIN(TSIF0 receive clock input )

2.TS0_EN_WAITO(date enable)

3.TS0_PSTIN(packet start)

 4.TSDIN0——TSDIN7(data)

the above eleven pins right ? thanks.

hello Sudhakar :

 Thanks for your reply, I test the parallel,synchronous,and input model of TSIF0, I am not sure whether I only need  the following eleven pins or need some more?

1.TS0_CLKIN(TSIF0 receive clock input )

2.TS0_EN_WAITO(date enable)

3.TS0_PSTIN(packet start)

 4.TSDIN0——TSDIN7(data)

the above eleven pins right ? thanks.

Yes, these pins are correct.

Regards, Sudhakar

Hello  Sudhakar:

             I'm zhichao tan,and Lucy Kaka is also me. I'm sorry for that.

            Today,I  have a good news to tell you——I have successful  in accomplishing the TSIF0 to receive the TS data from the MPEG2 TS Analyzer which designed by our engineers in the model of parallel、sync. Then I will talk with everyone how  I get the success,may be it belongs to you, This morining I have received the message you leaved by the Emai(you says :"To make sure that the setup is proper, you can make use of the saTsifLoopback application which demonstrates TS loopback capability with TSIF0. The data is sent out on TSIF0 TX and received in TSIF0 RX.",have you remember that? ),the followings are my  steps:

(1) Modify the application tsif_usrptr_buffer.c (eg:the PMT PID,the Video PID,the Audio PID according   to my  TS Source data)

(2) ./tsif_usrptr_buffer 60000 60000 60000 60000

then failed as I showed in the past days,the application can't get any data because of tsif_isr can't be executed.

Then try to execute the application tsif_lookback.c.

./tsif_lookback parallel sync

OK,the send program can execute the tsif_isr,it can send the data which from sample.c.

Last,execute ./tsif_usrptr_buffer 60000 60000 60000

then OK,the tsif_isr can be executed,and can receive the Ts data.

Thank goodness!But why?I think this is easy to find out.

Thank you,Sudhakar and everyone.