I see according the the tatest TRM GPIO_126 is defined twice in the Table 7-4. Core Control Module Pad Configuration Register Fields
Once for
CONTROL_PADCONF_MMC1_DAT4[15:0] and again for
CONTROL_PADCONF_CAM_WEN[31:16] How can this be? Is this a misprint? If so are there other GPIO's that are dual defined and actually go to two different pins?