RTOS/AM3352: L2 Cache latency settings

Kummi

Part Number: AM3352

Tool/software: TI-RTOS

Hi,

We would like to know what value should we use for Tag RAM latency/Data RAM latency
bits when enabling the L2 Cache (Cortex-A8 L2 Cache Auxiliary Control Register).
Couldn't find details on the ARM TRM or AM335x manuals.
Should these bits be left at default value?

Best Regards
Kummi

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

The factory team have been notified. They will respond here.

0 Kummi over 8 years ago in reply to Biser Gatchev-XID

Mastermind 6220 points

Please let me know if there is any advice on this question.

0 Kummi over 8 years ago in reply to Kummi

Mastermind 6220 points

Hi,

Any updates on this question?
Please let us know what values should we set for L2 cache latency?

0 JJD over 8 years ago in reply to Kummi

TI__Guru* 89485 points

Kummi, you can set these to the minimum values. This should already be done by the RTOS when enabling the cache in a pl310 Initialization function.

Regards,
James

Processors

Processors forum

RTOS/AM3352: L2 Cache latency settings