Peripheral Device Transfer PDT pin(DSK 6416)

When I open the C6416 datasheet and do a search for PDT, I quickly find references to the PDT pin on both the EMIFA and EMIFB, pin names APDTn and BPDTn, resp. The C6000 EMIF User's Guide and the EDMA2 User's Guide also have information on PDT.

Is this what are you looking for?

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Hi Randy,

Yes!.. I did find PDT control registers description on the EMIF datasheet and EDMA. The thing was I could not find the PDT pin on the EMIFA, then I realized it was called PDTA ( actually a data pin ) after I looked up XAPP753.

Have you ever connected the  EMIF to a Xilinx FPGA ? The EMIF has to be connected to 0.1 inch header on the FPGA whereas the EMIF is 0.05 inch. Can you suggest me any cables to use for testing ?

Thanks,

Varun

Varun Sridharan said:

I realized it was called PDTA ( actually a data pin )

I am glad you found the pin. Just trying to be accurate, the pin is not called PDTA, it is called APDT or BPDT depending on whether it is for EMIFA or EMIFB. It is a control pin and not a data pin. I hope you have not confused it with something else. If you found it called PDTA somewhere, let me know where so I can submit a doc error report.

Varun Sridharan said:

The EMIF has to be connected to 0.1 inch header on the FPGA whereas the EMIF is 0.05 inch. Can you suggest me any cables to use for testing?

I would expect the nice folks at Xilinx would be the best first place to check for a connector from a TI EVM/DSK to one of their boards. There may be some vendors who make this exact cable outside of Xilinx, but I would probably start with two breakout connectors and build my own cable, just to get it right. I know that you can get the DSP-side breakout from companies like Link-Research. They might be able to make exactly what you need, or at least provide breakouts for both sides of your cable. Sorry I cannot be more helpful with that.

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Varun Sridharan said:

There is a mention of /PDTA in page 121 of SPRU 266E  - TMS320C64X EMIF under "Peripheral Device Transfer". So the PDT pin is called PDTA(B) for EMIFA(B).

The datasheet defines all the pins that are available on a device. The EMIF User's Guide describes the features that can be available on a member of the C64x family of devices and how those features are use.

The "pin name" mentioned on page 121 is a pin function description, and Table 4-10 almost tells you which actual EMIF pin names are used to implement that pin function. The PDT Access function is called PDTA in the EMIF UG, but the actual pin used is one of the three listed in Table 4-10, but you still have to add the EMIFA/B letter in front. So for a 64-bit wide EMIFA interface, the PDTA (PDT Access) function will be presented on the pin AEA19.

There is also a PDTDIR pin function that has different EMIFA/B pin names on which it is presented. And the "main" PDT signal does have its own pin name on either EMIFA (APDT) or EMIFB (BPDT).

Varun Sridharan said:

Regarding the EDMA controller, does it consider EXT_INT pin ( either pin 4 ,5,6, or 7 ) as an external event to perform a PDT write from an external FIFO to SDRAM. I am going to connect the FIFO almost_full flag to the EXT_INT.

How do you read this EXT_INT pin ? Is it by checking whether the corresponding bit of the  Interrupt Flag Register ( IFR )  is set ?

DMA channels 4-7 can be triggered by the pins GPINT4-7/EXT_INT4-7. You may program the corresponding DMA channel's PARAM so it will perform a PDT write. Connecting the FIFO almost_full flag to GPINT4/EXT_INT4 will be a good plan.

If you are using GPINT4/EXT_INT4 as an EDMA event, the programmed transition will cause the DMA transfer to be triggered without the DSP having to read the pin. If you are using GPINT4/EXT_INT4 as a DSP interrupt, the programmed transition will cause the DSP interrupt by setting a bit in the IFR which then causes an interrupt servicing process for the DSP, without the DSP having to read the pin directly. If  you want to directly GPINT4/EXT_INT4 as a DSP GP Input, you can use the GPIO interface to do that; but you probably do not want to do that.

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Dear Mr.Randy,

Thanks for your reply.

So the APDT pin of the EMIFA  is accessed using the PDTA ( PDT access ) pin on the expansion connector on the DSP board ?( Since APDT is not present on the expansion connector)

And I would like to thank you for suggesting me "Link Research". I found a 80-pin  break out panel which fits exactly with the EMIF expansion card slot.

- Regarding the EXT_INT 4 pin, to detect it and perform an PDT , I need to

- Enable the Event Enable register (EERn) for that channel which is connected to EXT_INT 4.

- Program the PARAM register ( and the PDTD is set in the OPT register ).

-  Set the CE space and SDRAM control registers accordingly.

After all this have been initialized does this mean that a transition of EXT_INT4 from low to high, will trigger a PDT.

Thanks,

Varun

Varun Sridharan said:

the APDT pin of the EMIFA  is accessed using the PDTA ( PDT access ) pin on the expansion connector on the DSP board ?

I recommend tracing the signal on the schematic for the board to verify that the signal names are used the way you have said. Different people like to use different names, but I find that confusing. And it may have led to this discussion on names that we have had over the past few days.

Varun Sridharan said:

Regarding the EXT_INT 4 pin, to detect it and perform an PDT , I need to . . .

You definitely have a good understanding of the paths inside and outside the DSP that need to be initialized and activated. The items you listed are all things that need to be handled correctly to get the transfer to trigger and to complete. Honestly, I do not want to say that this is the complete list of everything because the EMIF User's Guide and the EDMA2 User's Guide and the datasheet and the CPU & Instruction Set Reference Guide all have more complete information than what I can tell you by looking at your list. Nothing comes to my mind that you are missing, but I always start a program from a working example and build from there because there are always small items that need to be part of the initialization process that I would forget otherwise. The EVM should come with example programs and the CSL should have example programs that show you how to get a simple DMA transfer to trigger and complete; you could start from one of those to make sure you have all the steps taken into account.

There may not be an example for exactly what you want to do, but there are always examples that are good enough to use as a starting point.