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I wrote u-boot_nand.ais on L138 to changing DDR clock, but fail.

Other Parts Discussed in Thread: OMAP-L138, OMAPL138

Hi.

I'm working without JTAG, so I proceed http://processors.wiki.ti.com/index.php/GSG:_DA8x/OMAP-L1/AM1x_DVEVM_Additional_Procedures#Flashing_Boot_Images_on_Linux_Without_CCS

I can change the U-boot and Kernel, but building AIS or UBL is not well-known yet.

What I did is as follows.

1. Build "boot-strap\armubl-03.20.00.12\ccsv3.3\ubl-omapl1x8.pjt" on CCS v3.3(Zoom EVM' CD)

2.   'ubl-nand.out' got

3.  Using 'AISgen for D800K006' and 'l138-uboot.cfg => 'ubl-nand-ais.bin'

-device type: set all of each(d800k002, d800k004, d800k006)

4. I command   sfh_OMAP-L138.exe -flash -flashType NAND  -targetType OMAPL138 ./ubl/ubl-nand-ais.bin u-boot-NAND.bin

5. Power up on NAND boot-mode, I received "Chip initialization failed!" through UART.

I'm sorry that I couldn' t know to solve this trouble.

Would you teach me my mistake point and troubleshooting?

 I just want to change clock of mDDR2  from 150Mhz to 132MHz.

Thank you for reading.

  • Are you using the EVM or a custom board? There are some functions in the UBL that initialize the PMIC, and if your board does not have that it will fail.

    Try loading the .out file for the UBL in CCS and step through the code to see where it returns E_FAIL.

    Jeff

  • Thank you for your answer.

    I use both EVM and development board(custom).

    I also tested that with EVM,  unfortunately it outputs  the  message of  "Chip initialization failed!", too.

    What I thought is follows

    • ubl_nand.out ~= ubl_OMAPL138_NAND.out 
    • ubl_nand_ais.bin ~= ubl_OMAPL138_NAND.bin <= UBL file

    Is this relationship images wrong?

     

  • The relationship is correct.

    Have you tried using the UBL in the serial flasher tools package? You can modify the DDR settings and rebuild it using the steps in the flasher wiki.

    If you use the default images generated by the serial flasher do you get the same error, or only after modifying DDR settings?

    Jeff

  • I could change the DDR' s clock by AISgen PLL setting tab.

    My EVM is Zoom so I didn't refer to Hawk board's.

    but it is very helpful.

    Thank you.