Part Number: TMS320C6672
Hello.
I want to use EDMA3 to my custom 6672 board.
I referenced the edma_test.c code provided by the processor SDK(v03.03).
My goal is to copy 256 words array from DDR to FPGA (EMIF-16)
1. I think it is possible but I'm not sure cause EMIF-16 is 16 bit access as you know.
2. Now, I'm testing by copying from one buffer to another buffer.
I'm not sure how can set the second param.(procedure?)
After PaRAM set and manual trigger, what should I do?
I attached my code and the result said that the second trigger doesn't work. Thanks.
/******************************************************************************
** includes
******************************************************************************/
#define SOC_C6678 1
#include <stdio.h>
#include <ti/csl/csl_edma3.h>
#include <ti/csl/csl_edma3Aux.h>
#include <ti/csl/csl_cacheAux.h>
#include <ti/sysbios/BIOS.h>
#include <math.h>
#include <stdlib.h> /* malloc() */
#include <string.h> /* memset(), memcpy() */
#include <stdio.h>
#include <xdc/runtime/System.h>
#include <assert.h>
#include <time.h>
#include <xdc/std.h>
#include <xdc/runtime/Types.h>
#include <xdc/runtime/Timestamp.h>
#include "pll.h"
#include "psc.h"
#include "ddr3.h"
#include "gpio.h"
#include "emif.h"
#include "bit.h"
#include "mcGdbg.h"
#include "mcTMS320C6672.h"
#define TEST_SIZE 256
/******************************************************************************
** globals
******************************************************************************/
#if 0
Uint8 srcBuff1[TEST_SIZE];
Uint8 srcBuff2[TEST_SIZE];
Uint8 dstBuff1[TEST_SIZE];
Uint8 dstBuff2[TEST_SIZE];
#else
Uint16 srcBuff1[512];
Uint16 srcBuff2[512];
Uint16 dstBuff1[512];
Uint16 dstBuff2[512];
#endif
MC_VOID main(void)
{
MC_INT16 testType = 0;
int i, btn;
//MC_INT32 status;
MC_UINT32 temp = 0, err = 0, val = 0;
Types_Timestamp64 ts1, ts2;
Types_FreqHz freq;
double processing_time, dbTemp;
long long k;
MC_UINT32 tempval[3] = {0};
static int Test_Iter;
tAInSigVal GcuAinSig;
float temp1, temp2;
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParamPing;
CSL_Edma3ParamHandle hParamPong;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3CmdDrae regionAccess;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup myParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
Uint32 loopIndex;
Int32 instNum = 0;
Uint8 channelNum = 0;
Int32 regionNum = 0;
int j = 0;
/* Initialize data */
for (loopIndex = 0; loopIndex < TEST_SIZE; loopIndex++)
{
srcBuff1[loopIndex] = loopIndex;
dstBuff1[loopIndex] = 0;
}
/* Module initialization */
if (CSL_edma3Init(&context) != CSL_SOK)
{
printf ("Error: EDMA module initialization failed\n");
return -1;
}
/* Open the EDMA Module using the provided instance number */
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ( (hModule == NULL) || (status != CSL_SOK))
{
printf ("Error: EDMA module open failed\n");
return -1;
}
/* Channel open */
chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK))
{
printf ("Error: Unable to open EDMA Channel:%d\n", channelNum);
return -1;
}
if(!instNum)
{
/* For first EDMA instance there are only 2 TCs and 2 event queues
* Modify the channel default queue setup from 0 to 1
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
else
{
/* For EDMA instance 1 and 2 maximum of 4 TCs and 4 event queues are supported
* Change Channel Default queue setup from 0 to 3
*/
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_3) != CSL_SOK)
{
printf ("Error: EDMA channel setup queue failed\n");
return -1;
}
}
/* Map the DMA Channel to PARAM Block 2. */
CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, 2);
/* Obtain a handle to parameter set 2 */
hParamPing = CSL_edma3GetParamHandle(hChannel, 2, &status);
if (hParamPing == NULL)
{
printf ("Error: EDMA Get Parameter Entry failed for 2.\n");
return -1;
}
/* Setup the parameter entry parameters (Ping buffer) */
myParamSetup.option = CSL_EDMA3_OPT_MAKE(CSL_EDMA3_ITCCH_DIS, \
CSL_EDMA3_TCCH_DIS, \
CSL_EDMA3_ITCINT_DIS, \
CSL_EDMA3_TCINT_EN, \
0, CSL_EDMA3_TCC_NORMAL,\
CSL_EDMA3_FIFOWIDTH_NONE, \
CSL_EDMA3_STATIC_EN, \
CSL_EDMA3_SYNC_A, \
CSL_EDMA3_ADDRMODE_INCR, \
CSL_EDMA3_ADDRMODE_INCR );
myParamSetup.srcAddr = (Uint32)srcBuff1;
myParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(TEST_SIZE*sizeof(Uint16),1);
myParamSetup.dstAddr = (Uint32)dstBuff1;
myParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,0);
myParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF,0);
myParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,0);
myParamSetup.cCnt = 1;
/* Ping setup */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x3;
regionIntr.intrh = 0x0000;
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr);
/* Trigger channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on IPR bit 0 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear the pending bit */
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
for (i=0; i<TEST_SIZE; i++)
{
if (srcBuff1[i] != dstBuff1[i])
{
printf("Error Test #1 : i = %d\n", i);
break;
}
}
// memset(dstBuff1, 0x0, sizeof(TEST_SIZE*sizeof(Uint16)))
for (loopIndex = 0; loopIndex < TEST_SIZE; loopIndex++)
{
dstBuff1[loopIndex] = 0;
//dstBuff2[loopIndex] = 0;
}
/* Ping setup */
if (CSL_edma3ParamSetup(hParamPing,&myParamSetup) != CSL_SOK)
{
printf ("Error: EDMA Parameter Entry Setup failed\n");
return -1;
}
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x3;
regionIntr.intrh = 0x0000;
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr);
/* Trigger channel */
CSL_edma3HwChannelControl(hChannel,CSL_EDMA3_CMD_CHANNEL_SET,NULL);
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0;
regionIntr.intrh = 0;
/* Poll on IPR bit 0 */
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
/* Clear the pending bit */
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
for (i=0; i<TEST_SIZE; i++)
{
if (srcBuff1[i] != dstBuff1[i])
{
printf("Error Test #2 : i = %d\n", i);
break;
}
}
/* [9] Enable interrupts and start SYS/BIOS */
BIOS_start();
}
/* End of File : Main.c */
[C66xx_0] Error Test #2 : i = 1
