Hi Team –
We have 2 patches for a custom board, and were hoping they could be verified for the Vcore and PMIC. I can send the files through email.
1) Changes in UBOOT dts for AM5708 (we have taken am571x-idk dts as reference) , we have changed PMIC which is over I2C1. We are using LP8332 and LP8322. We have changed input voltage characteristics of other nodes accordingly.
2) I have added board.c file for our board, which has changes for VCORE.
Also, I was hoping that someone could comment on the following:
1) In AM571x-idk board, SoC has capacity of running DDR over 666MHz (1333MHz) but in AM571x-idk configured it as 532 Mhz (1066 Mhz ). So, we’re also using it as 532Mhz in our AM5708 SoC based custom board. We have derived timing parameters for AM5708 SoC for 532Mhz clock speed. Would it work perfect with 666Mhz clock speed if we change the PLL settings and parameters accordingly? Why are we not using DDR at 666Mhz in AM571x-idk board?
Thank you,
Dan
