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C6727B SPI Master Boot

Boll
Intellectual 340 points

Hi,

Question 1:

According to Advisory 1.2.2 of "SPRZ232F - C672x Digital Signal Processors Silicon Errata",  Do Not Use SPI Master Boot Mode for Silicon Revision 1.2/C9230C100 ROM.

I'd like to inquire that if this bug has been fixed in next version of ROM Bootloader.

If yes, what is the newest version of ROM? And where can I obtain it?

Question 2:

Is there any document to describe how to write a two-stage bootloader for C6727B to communicate with a 24-bit EEPROM or serial FLASH in SPI Master booting mode?

Thanks.

  • 0
    TI__Mastermind 24340 points

    Lee said:

    Question 1:

    According to Advisory 1.2.2 of "SPRZ232F - C672x Digital Signal Processors Silicon Errata",  Do Not Use SPI Master Boot Mode for Silicon Revision 1.2/C9230C100 ROM.

    I'd like to inquire that if this bug has been fixed in next version of ROM Bootloader.

    If yes, what is the newest version of ROM? And where can I obtain it?

    This bug is present in the latest version of the ROM (1.2) - C6727B, and there is not time frame for a new revision.

    Lee said:

    Question 2:

    Is there any document to describe how to write a two-stage bootloader for C6727B to communicate with a 24-bit EEPROM or serial FLASH in SPI Master booting mode?

    Could not find that, for a list of application notes available please see:

    http://focus.ti.com/dsp/docs/dspsupporttechdocs.tsp?sectionId=3&tabId=409&viewType=mostuseful&familyId=327&docCategoryId=1&techDoc=1&rootFamilyId=44

     

  • 0 in reply to Mariana
    Intellectual 340 points

    Dear Mariana,

    Thanks for the reply.

    Then I will have to move to other booting options.

  • 0 in reply to Boll
    Intellectual 340 points

    Hi,

    Also the booting problem.

    There are two C6727B for my project, referred as DSP1 and DSP2. DSP1 is migrated from other type of processor.

    DSP1 will use EMIF Booting mode.

    I still want to use SPI Slave Booting for DSP2 due to legacy reason, and DSP1 will be the external host. That is: DSP1->SPI    <==>    DSP2->SPI

    My question is:

    Since SPI communication is not very stable, Is this scheme recommended for DSP2?

     Thanks.

  • 0 in reply to Boll
    TI__Guru 62975 points

    Boll,

    I do not think that the SPI communication is inherently unstable.  The problem with SPI and boot is that the hard-coded parameters in the ROM introduce restrictions on SPI usage.  Since you are proposing SPI boot where the SPI master is another C6727B, you will have the flexibility of programming the speed and configuration settings on the SPI master that are friendly to SPI Slave ROM Boot.

    -Tommy

  • 0 in reply to Mariana

    Hi,

    Could you please tell me if there is something new on that subject ?

    I mean, can I use the SPI Master Boot mode of the C6727B safely or not ?

    Thanks.

    Jean-Francois.

     

  • 0 in reply to Jean-Francois Uhoda
    TI__Expert 3020 points

    Hello Jean-Francois,

    As stated in the errata sheet, the C6727B ROM code is not able to boot using the SPI Master Boot mode. There is no new revision of this chip or rom code fix planned, sorry for the inconvenience.

    If this is a new design and depending on you use case you might want to take a look at the C674x fixed/floatingpoint DSPs.

    Regards,

    Lo