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66AK2G02: High speed bypass capacitance question

Brian Antheunisse
Expert 5305 points
Part Number: 66AK2G02


Hi Guys,

The Table 7-8 in data sheet(sprs932e for 66ak2g02) of K2G indicates the minimum of DDR3L device HS bypass capacitor total capacitance is 0.85uF. But K2G EVM only has thirteen 0.01uF HS bypass caps. (K2G EVM does have one 22uF bulk cap to meet the requirement of bulk capacitors listed in Table 7-7).

 

 

I have the following questions:

Q1: Why K2G EVM doesn’t fail the power distribution network analysis? Please see the “4 Conclusion” in sprac38, “66AK2G0x General-Purpose EVM Power Distribution Network Analysis.”

Q2: I know the capacitance requirement varies from design to design. Should I start with the same bypass capacitance on EVM? Or change it to meet the requirement listed in data sheet? 

Thanks,

Brian

  • 0
    TI__Guru**** 161600 points
    Hi Brian,

    Q1: Why K2G EVM doesn’t fail the power distribution network analysis? Please see the “4 Conclusion” in sprac38, “66AK2G0x General-Purpose EVM Power Distribution Network Analysis.”

    I was not involved in the design of the board, so I cannot answer this question.

    Q2: I know the capacitance requirement varies from design to design. Should I start with the same bypass capacitance on EVM? Or change it to meet the requirement listed in data sheet?

    Our recommendation is to always follow the Data Manual recommendations (see Section 2.1 EVM versus Data Sheet in 66Ak2G02 Schematic Checklist - www.ti.com/.../sprac54.pdf). This document is the most up to date reference, when designing your board with 66AK2G02 device. So I'd advise to meet the requirements listed in the data sheet & then start the PDN analysis.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    TI__Expert 5305 points

    Thanks Yordan, I spoke to Bill offline about this and he is going to add some comments here.

    Thanks,

    Brian

  • 0
    TI__Mastermind 42545 points

    Hi Brian,

    As you pointed out, in the EVM schematics all of the capacitors close to the DDR memories are 0.01uF which doesn't provide the capacitance shown in the table. The analysis was performed with the 0.85uF shown and eight of the thirteen capacitors in the schematic were supposed to be changed to the 0.1uF value. Unfortunately that didn't get caught before we released the EVM to production.

    EVMs are developed early in the life of the SoC and do not always follow all the requirements. Often this is because the requirement didn't exist when the board was designed. When you are presented with difference between the EVM and the data manual, you should always follow the recommendations shown in the data manual. It will have the most current information.

    Regards,

    Bill