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TMS320C6742: HPI

user492473635
Prodigy 20 points
Part Number: TMS320C6742

I would like to connect two DSPs (TMS320C6742) using HPI. Due to safety reasons, DMA, McBSP and cache will be deactivated. Can I use this port under these circunstances? Do you have an example for connecting two TI DSPs using HPI?

  • 0
    TI__Guru**** 161600 points
    Hi,

    Due to safety reasons, DMA, McBSP and cache will be deactivated. Can I use this port under these circunstances?

    The HPI does not have any dependency on McBSP. Also the HPI DMA logic is independent of the processors EDMA subsystem, so you should be able to use HPI with DMA & McBSP deactivated.

    Do you have an example for connecting two TI DSPs using HPI?

    I am not aware of a sw example for HPI.

    Best Regards,
    Yordan
  • 0 in reply to Yordan Kovachev
    Prodigy 20 points

    Thank you for your answer.

    The example I am looking for is the HW connection between two TMS320C6742 using HPI (or another two TI DSPs).

    Regards,

    Eduardo

  • 0
    Guru 13202 points
    Hello!
    I had a little different but still relevant experience. We used HPI to boot C6414 and then to communicate with ARM processor. We had a split buffer for Tx/Rx exchange in L2SRAM and interrupts to notify the peer about data. The decision to go that way was taken after discussion on e2e.ti.com/.../181052. Once again I'd like to admit Sam Kuzbary helped us a lot with opinion, schematic excerpt and some code reference. Thank you, great man.
    As HPI itself, that also was my best experience with TI DSP's peripheral, it worked just as expected and required very little efforts to develop.
    For your situation McBSP makes no difference. As to cache, if I got you right, you're planning to work with L2SRAM as memory only, that's perfectly OK. As to EDMA, you don't need to configure EDMA controller to get it working, though HPI itself uses kind of DMA logic to access the memory.
    Hope this helps.