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CCS/66AK2H12: cross trigger between 2 devices

Jiyoon Oh
Intellectual 265 points
Part Number: 66AK2H12

Tool/software: Code Composer Studio

Hi. I have some questions about cross-triggering between 2 devices.

I want that when a core of a device stops in a breakpoint, all cores (or at least one core) of other device are suspended by cross-triggering.

So I did the below test.

(1) I used 2 emulators(Blackhawk USB560v2 System Trace) for 2 devices.

 And I connected EMU0/1 pins of two 66AK2H12 devices each other. (Other EMU pins except these 2 pins were not connected.)

(2) In the CCS target configuration, I configured 2 emulators.

In the CCS Debug window, I made a Group with core0/device0 and core0/device1.

And I checked "Enable Global Breakpoints" option in the popup menu of the Group.

(though I know global breakpoint is not available when the separate emulators are used.)

(3) I set a breakpoint for Device0/Core0, and ran Device1/Core0 and Device0/Core0 .

<Result> Device0/Core0 stopped in the breakpoint but Device1/Core0 was not suspended at that time. And both EMU0/1 pins signal was not changed(both High).

1. The above sequence for test are correct? or Is there anything I have to do for cross-triggering before?

2. Guide(SPRUHM4.pdf) says that DRM(or DPM) setting is needed for Trigger0/1 lines to be used as external triggers. 

    I tried to check Debug Resource Manager Registers, but I couldn't find the address of the registers of 66AK2H12.

    In 66AK2H12.pdf, I found an memory mapped area(debug_ss configuration; 0x0300 0000). Is this the base address of Debug Resource Manager Registers? 

    I cannot change the value  of that address area in CCS memory browser.

 3. How can I check configuration(settings) of my target is correct for cross-triggering between devices?

Thank you.

 

  • 0
    TI__Guru 65405 points
    Hi Jiyoon,

    I've forwarded this to the c66x core experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0 in reply to Cvetolin Shulev-XID
    TI__Guru* 95265 points
    Hi,

    Here is a wiki: processors.wiki.ti.com/.../Multi-Core_Debug_with_CCS. Can you check the steps below if helps:

    C66x based devices: The DRM needs to be configured to output the proper signals to enable global breakpoints across different devices on the same JTAG scan path (ex: 2 separate C6670 devices on the same JTAG scan path). This can be done with this GEL file.

    The GEL file is for C6670 with
    #define L3_DBGSS_STM_BADDR (unsigned int)(0x20000000) // Base address of STM-data of debugSS

    This is the same for 66AK2H12 device.

    Regards, Eric
  • 0 in reply to lding
    Intellectual 265 points

    Hi, Thank you for your reply.

    I add some questions about this. 

    1. According to GEL file that you said, Debug_SS configuration base address is 0x0240 0000, and DRM base address is 0x0242 0000 in C6670.

    What is DRM base address of 66AK2H12? From what document can I find information about that?

    2. I read  the below sentence in document, 'Emulation and Trace Headers Technical Reference Manual'(SPRU655i.pdf) p35.

    "each device is in its own scan chain. Synchronous execution, cross triggers, and global breakpoints are not supported.

    Connecting EMU0 and EMU1 between devices in this configuration would allow cross triggers to operate,

    but if routes are long it could make the pins unusable for trace."

    So I think only EMU0/1 connections is needed for cross-triggering.

    What I want is just that when a core stops in a breakpoint, the cores of other device are suspended.

    For this, should global breakpoint be enabled? or Is only cross-triggering needed?

    What is difference or relation between global breakpoint and cross-triggering?

    Thank you.

  • 0 in reply to Jiyoon Oh
    Intellectual 265 points

    Is there anyone who gives answer for this issue?

  • 0 in reply to Jiyoon Oh
    Intellectual 265 points
    Hi, lding.
    I can't find DRM(Debug Resource Manager) configuration guide for 66AK2H12.
    Please give me some guide for that.
  • 0 in reply to Jiyoon Oh
    TI__Guru**** 171004 points

    Hi,

    Please apologize for the delay in your reply. 

    Despite I am not an expert on the particular device you are using, I found the following information:

    Jiyoon Oh said:
    1. According to GEL file that you said, Debug_SS configuration base address is 0x0240 0000, and DRM base address is 0x0242 0000 in C6670.

    What is DRM base address of 66AK2H12? From what document can I find information about that?

    I could not find specific addresses for the Debug Subsystem registers, but inside the trace configuration XML file for Kepler (Hawking and Kepler are very similar in this regard) I found the property DEV_CHAR_DRMBASE_ADDR. This file is located at:

    ccsv7/ccs_base/emulation/analysis/xmldb/trace_config/devices/device_kepler.xml

    Jiyoon Oh said:
    So I think only EMU0/1 connections is needed for cross-triggering.

    Yes, you are correct. EMU0/1 are used for inter-device cross triggering. This is mentioned in section 11.26.1 of the 66AK2H12 Datasheet and is hinted in Figure 3-1 of the Debug and Trace User's Guide (SPRUHM4).

    Jiyoon Oh said:
    For this, should global breakpoint be enabled? or Is only cross-triggering needed?

    Global breakpoint is what you (user) configures to Run/Halt the devices/cores needed. The Global Breakpoints will use the Cross triggering HW to accomplish that.  The document linked by lding shows how this is presented to the user. 

    Hope this helps,

    Rafael

  • 0 in reply to desouza
    Intellectual 265 points

    Thank you. desouza
    But, I couldn't resolve the problem.

    I found DRM base address from gel file that you said. It is 0x80017000.
    But, according to 66AK2H12 datasheet, the address region (0x80000000~0xFFFFFFFF) is for DDR3.

    How can I write some value in DRM registers?

    And what configuration is needed for cross trigger between devices? Can I get some sample code or gel file ?

  • 0 in reply to Jiyoon Oh
    Intellectual 265 points
    Is there anyone who make cross triggering between two devices using EMU0/1 connection?