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Starterware/AM3359: The problem of SPI about SPI1

68 686
Prodigy 40 points
Part Number: AM3359

Tool/software: Starterware

AM3359 ice

IDE:CCS

I found the sample codes that only having spi0's setting not spi1 did.

And I thing to know that McSPI1ModuleClkConfig() and McSPI1CSPinMuxSetup()  to how to change from McSPI0ModuleClkConfig() and McSPI0CSPinMuxSetup()  in mcspiFlash.c.

Because there are no McSPI0ModuleClkConfig() and McSPI0CSPinMuxSetup()'s codes 

Can you give me the suggestions or samples to write McSPI1ModuleClkConfig() and McSPI1CSPinMuxSetup().

thanks

  • 0
    Intellectual 720 points
    Hi. This is the code to set the clock. The pinmux depends on your config.

    /*
    ** Configure clock to spi
    */
    static void McSPI1ModuleClkConfig(void) {

    HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) =
    CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
    CM_PER_L3S_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) =
    CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
    CM_PER_L3_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) =
    CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
    CM_PER_L3_INSTR_CLKCTRL_MODULEMODE) !=
    CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE);

    HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) =
    CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
    CM_PER_L3_CLKCTRL_MODULEMODE) != CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE);

    HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) =
    CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
    CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL) !=
    CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) =
    CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
    CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL) !=
    CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP);

    HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) =
    CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) &
    CM_PER_L4LS_CLKCTRL_MODULEMODE) != CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);

    HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) &= ~CM_PER_SPI1_CLKCTRL_MODULEMODE;

    HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) |= CM_PER_SPI1_CLKCTRL_MODULEMODE_ENABLE;

    while ((HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) &
    CM_PER_SPI1_CLKCTRL_MODULEMODE) != CM_PER_SPI1_CLKCTRL_MODULEMODE_ENABLE);


    while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
    CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK));

    while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
    CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK));

    while (!(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
    (CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK |
    CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK)));

    while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
    (CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK |
    CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_SPI_GCLK)));
    }

    /*
    ** This function selects the McSPI pins for use. The McSPI pins
    * are multiplexed with pins of other peripherals in the SoC
    */
    static void McSPI1PinMuxSetup(void) {

    HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_ACLKX) = 0x33;
    HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_FSX) = 0x33;
    HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_AXR0) = 0x33;
    }