Part Number: TCI6638K2K
1. Can AIF2 support the cpri protocol scrambling and descrambling ?
I want use cpri protocol with link Rate 8x ,which bandwidth should be 4.914G,therefore I need scrambling to make sure workable in this rate.
Unfortunately, I only found register setting in OBSAI mode and rate is 8x(scr_en AIF2_TM_SCR_CTRL[0-5]),is there any other setting option can help me?
2. I am trying sync FPGA with DSP by AIF modual in cpri mode,FPGA show state sync successful, but DSP hardly always sync failed which state register shows RM_LK_STS0[1] 0x01f50814 is '00000108',
how to fix this problem.I have fixed AT_PIMAX_LK and AT_PIMIN_LK, but it seems didn't work.
relative register value
SD_PLL_B8_STS 0x01f0b010 = 00000001
SD_PLL_B4_STS 0x01f0b014 = 00000000
SD_RX_STS[1] 0x01f0880c = 00000004
DB_IDB_GLOBAL_EN_STS 0x01f1000c = 00000001
TM_LK_STAT [1] 0x01f4c838 = 00000040
RM_LK_STS0[1] 0x01f50814 = 00000108
RM_LK_STS1[1] 0x01f50818 = 00000625
RM_LK_STS2[1] 0x01f5081c = 00000000
RM_LK_STS3[1] 0x01f50820 = 02e586db
RM_LK_STS4[1] 0x01f50824 = 300c131c
RT_LK_STAT[1] 0x01f5480c = 00000000
AT_PIVALUE_LK 0x01f48114 = 000a2308
AT_PIMAX_LK 0x01f4810c = 001b0000
AT_PIMIN_LK 0x01f48110 = 00030000
