kernel crashes while trying to run capture appliction on dm6446 based board

The call to VIDIOC_DQBUF requests a video buffer to the kernel.  In roder to requestt a buffer, first you would need to allocate a certain number of buffer (two or more recommended); I forget the exact VIDIOC ioctl to do this, but you can refer to the demos included in the DVSDK as a reference. 

Hi Juan, thanks for your reply. i checked the code in kernel in file media/video/davinci_vpfe.c & found out that max number of buffer allocated by vpfe_init is 3 whereas i wad allocating 

4 buffer so that expalins the crash but i'm still getting the errors.

Before DQBUF

buffer waiton: -EINTR

dqbuf: waiton returned -4

root@192.168.1.211:/opt/dvsdk/capture#

though i'm not getting a kernel crash now.

& which demo are you referring to , all the example in the demo uses codec engine & dsplink & all the stuff. i have written a basic application which will just

capture a frame from the input composite signal.......

Thanks

I was referring to the encode, decode, and encodedecode demos; they all do talk to codec engine to access encoding and decoding algorithms but this can be commented out if you are not interested in encoding or decoding video.  For capture, the encode demo already accepts composite input signal and stores it to a file.

Hi Juan, thanks again for the reply. i did what u said. i commented all the non requisite portion of the code in encode demo but I'm still getting some error albeit differnt one .

the error is in Dequeue Buf only , only this time it is

        VIDIOC_DQBUF error 11, Resource temporarily unavailable

I tried to figure  out the source code & found that this error is due to TVP5150 decoder which we have installed on our board (instead of default tvp5146). But i'm still not able to 

figure out the problem coz the decoder seems to working fine. It initializes properly & following is the dump of it registers.

TVP5150 init
tvp5150 0-005c: *** Rom ver is 2.16
Selecting video route: route input=0, output=0 => tvp5150 input=0, opmode=0
Set video std register to 0.
tvp5150: Video input source selection #1 = 0x00
tvp5150: Analog channel controls = 0x15
tvp5150: Operation mode controls = 0x00
tvp5150: Miscellaneous controls = 0x6f
tvp5150: Autoswitch mask= 0x00
tvp5150: Color killer threshold control = 0x10
tvp5150: Luminance processing controls #1 #2 and #3 = 60 00 00
tvp5150: Brightness control = 0x80
tvp5150: Color saturation control = 0x80
tvp5150: Hue control = 0x00
tvp5150: Contrast control = 0x80
tvp5150: Outputs and data rates select = 0x40
tvp5150: Configuration shared pins = 0x02
tvp5150: Active video cropping start = 0x0000
tvp5150: Active video cropping stop  = 0x0000
tvp5150: Genlock/RTC = 0x01
tvp5150: Horizontal sync start = 0x80
tvp5150: Vertical blanking start = 0x00
tvp5150: Vertical blanking stop = 0x00
tvp5150: Chrominance processing control #1 and #2 = 0c 54
tvp5150: Interrupt reset register B = 0x00
tvp5150: Interrupt enable register B = 0x00
tvp5150: Interrupt configuration register B = 0x00
tvp5150: Video standard = 0x00
tvp5150: Chroma gain factor: Cb=0x00 Cr=0x00
tvp5150: Macrovision on counter = 0x0f
tvp5150: Macrovision off counter = 0x01
tvp5150: ITU-R BT.656.4 timing(TVP5150AM1 only)
tvp5150: Device ID = 5150
tvp5150: ROM version = (hex) 02.10
tvp5150: Vertical line count = 0x0271

please tell if i'm doing anything wrong here. i'm really stuck here !!!!!!!!!!!!!

thanks

mmm, are you sure that frames are being paseed from TVP5150 to DM6446 (how are you determining this)?  If so, the DM6446 portion of the driver should successfully complete VIDIOC_DQBUF; otherwise it may time out with an error

Juan, I have output lines with oscilloscope. The output from tvp5150 lines to dm6446 are pclk 27MHz,  hsync 50Hz, vsync 15.6Khz, & ramdom output on lines y0-y7. so I'm pretty sure

that tvp5150 i generating some output. what is the way through code i could confirm that the data is reaching dm6446.???

thanks again

yuvraj

Hi, Juan i'm using the default setting of CCDC for tvp5146 for tvp5150. I suspect i need to make some changes & adjustment there also. Can u guide me about this. Below is the reg. dump.

/*
Reading 0x1fe00 to PID...
Reading 0x0 to PCR...
Reading 0x32f84 to SYN_MODE...      ---doubt
Reading 0x0 to HD_VD_WID...
Reading 0x0 to PIX_LINES...
Reading 0x59f to HORZ_INFO...
Reading 0x10001 to VERT_START...
Reading 0x11f to VERT_LINES...
Reading 0xffff00ff to CULLING...
Reading 0x5a0 to HSIZE_OFF...
Reading 0x249 to SDOFST...
Reading 0x0 to SDR_ADDR...
Reading 0x0 to CLAMP...
Reading 0x0 to DCSUB...
Reading 0x0 to COLPTN...
Reading 0x0 to BLKCMP...
Reading 0x0 to FPC...
Reading 0x0 to FPC_ADDR...
Reading 0x10000 to VDINT...
Reading 0x0 to ALAW...
Reading 0x0 to FMTCFG...
Reading 0x3 to REC656IF...
Reading 0x8000 to CCDCFG...
Reading 0x0 to FMT_HORZ...
Reading 0x0 to FMT_VERT...
Reading 0x0 to VP_OUT...
*/

thanks & regards

yuvraj