Tool/software: Linux
Hello,
I'm using the AM5728's VIN5 port on VIP3 slice0 portA to capture parallel data with Hsync/Vsync.
Hsync is connected to ball N7 pad GPMC_A8 mux @0x4a003460 is set to 0x00040102 (vin3a_hsync0)
Vsync is connected to ball R4 pad GPMC_A9 mux @0x4a003464 is set to 0x00040102 (vin3a_vsync0)
Pixclk is connected to ball AH7 pad VIN1B_CLK1 mux @0x4a0034E0 is set to 0x00050106 (vin3a_clk0)
Pixelclock:
Hsync:
Vsync:
Setting the pinmuxes to MUXMODE=E shows in GPIO1_30:31 and GPIO2_31 that the bits toggle when read multiple times.
My VIP3 slice0 main @0x489B5500 is 0x00000001 (16 bit data)
My VIP3 slice0 port A config @0x489B5504 is 0x0040010A (discrete basic mode, enable, h/v sync)
My VIP3 slice0 port A xtra config @0x489B5500 is 0x0000000 (no repack)
Yet the output VIP_OUTPUT_PORT_A_SRC0_SIZE @0x489B5530 read 0x0 (no pixels/lines).
Is there anything between the input balls/pad and the VIP that requires configuration?
Some power/clock gating?
Best regards,
Lo2
