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EVMK2G: MCASP Clock initialization delay

Part Number: EVMK2G

Hello,

I'm currently using the Mcasp to drive a daisy chain of TDM micrphones that require both a data and frame sync clock.  I'm using the receive clock and frame sync from the MCASP however, in order to have the microphones initialize correctly, I need to delay the start of the frame sync by at least 10ms or more from the recieve Clock.  Currently the MCASP enables both clocks simultaneously and I was wondering what the best approach would be to delay the two.

 I'm working off a modified Audioloop example provided in the PDK 1.0.5 software package located under:

pdk_k2g_1_0_5\packages\ti\addon\audk2g 

Any tips would be appreciated. Thanks!

  • Hi,

    I've notified the sw team. Their feedback will be posted here.

    Best Regards,
    Yordan
  • Francisco,

    When performing the McASP initialization, have you tried to insert a 10 ms delay between when the receive state machine is release from reset and before the receive frame sync generator reset is released using RFRST in MCASP_GBCTL.  

    	 	if(CSL_FEXT(mcaspRegs->GBLCTL, MCASP_GBLCTL_RSMRST)!=CSL_MCASP_GBLCTL_RSMRST_ACTIVE){
     
     			//Start Recieve Serial Clock
     	 		CSL_FINST(mcaspRegs->RGBLCTL, MCASP_RGBLCTL_RSMRST, ACTIVE);
     	 	  	 
     	 	  	// Stall until GBLCTL reads back to ensure it was latched by the logic
     	 		while(CSL_FEXT(mcaspRegs->GBLCTL, MCASP_GBLCTL_RSMRST)!=CSL_MCASP_GBLCTL_RSMRST_ACTIVE);
     	 	}
    
                    // Add 10 ms delay
    
                     if(CSL_FEXT(mcaspRegs->GBLCTL, MCASP_GBLCTL_RFRST)!=CSL_MCASP_GBLCTL_RFRST_ACTIVE){
      			//Start Recieve Serial Clock
      		        CSL_FINST(mcaspRegs->RGBLCTL, MCASP_RGBLCTL_RFRST, ACTIVE);
      	  	 
      	  	        //Stall until GBLCTL reads back to ensure it was latched by the logic
      		        while(CSL_FEXT(mcaspRegs->GBLCTL, MCASP_GBLCTL_RFRST)!=CSL_MCASP_GBLCTL_RFRST_ACTIVE);
      	         }
    

  • Hi Rahul,

    Thanks for the reply, this is exactly what I'm trying to do.  However , and I apologize if this is trivial, I am having trouble finding where exactly this part of the initialization is defined. What driver file or where exactly is this referenced? I cannot seem to find it within the example provided.    Can you point me in the right direction? 

    EDIT:  I think I found it in the   "Mcasp_localActivateSmFsForRcv"  function in the mcasp_drv.c  file.   Thanks for the help!

  • Yes, Mcasp_localActivateSmFsForBoth should be where the frame sync generator is released from reset. The other functions to add this delay is Mcasp_localActivateSmFsForRcv

    mcaspBitSetGblCtl(instHandle,
                          (uint32_t) (MCASP_GBLCTLX_XSMRST_MASK |
                                    MCASP_GBLCTLR_RSMRST_MASK));
        mcaspBitSetGblCtl(instHandle, mcaspBitSetGblCtl(instHandle,
                          (uint32_t) (MCASP_GBLCTLX_XSMRST_MASK |
                                    MCASP_GBLCTLR_RSMRST_MASK));
        //Add delay here  
    
        mcaspBitSetGblCtl(instHandle,
                          (uint32_t) (MCASP_GBLCTLX_XFRST_MASK |
                                    MCASP_GBLCTLR_RFRST_MASK));
                          (uint32_t) (MCASP_GBLCTLX_XFRST_MASK |
                                    MCASP_GBLCTLR_RFRST_MASK));