Hi,
I'm working on 2 different OMAPLl138 boards. The first is stuffed with
32MB of mDDR and the second with 16MB of SDRAM. My mDDR board is
booting fine but I am having problems with my SDRAM board. To add
support for a SDRAM board I added a ARCH_DAVINCI_DA8XX_BASE_DDR or
ARCH_DAVINCI_DA8XX_BASE_SDRAM config to arch/arm/mach-davinci/Kconfig
and modified arch/arm/mach-davinci/include/
mach/memory.h as such:
#define DA8XX_SDRAM_BASE 0x40000000
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
#if defined(CONFIG_ARCH_DAVINCI_DA8XX_BASE_DDR)
#define PHYS_OFFSET DA8XX_DDR_BASE
#else
#define PHYS_OFFSET DA8XX_SDRAM_BASE
#endif
#else
The kernel starts but stalls when initializing the SPI1 controller (my
u-boot is able to use the flash on SPI1just fine). After some checking
it seems accessing the SPI1 registers is the problem, sort of like
accessing an address not mapped with the MMU. To verify this, I added
different debugging traces to my board_init to see if execution would
halt:
printk( "GPIO: %x\n", __raw_readl(IO_ADDRESS(0x01E26000))); //OK
printk( "EDMA3 TC2: %x\n", __raw_readl(IO_ADDRESS(0x01E38000))); //OK
printk( "eHRPWM0: %x\n", __raw_readl(IO_ADDRESS(0x01F00000))); //Stalls
printk( "SPI1: %x\n", __raw_readl(IO_ADDRESS(0x01F0E000))); //Stalls
I don't see how my change to the PHYS_OFFSET would affect this, but
this is the only change I can think of that might affect this.
Any leads or suggestions would be appreciated.
#define DA8XX_SDRAM_BASE 0x40000000
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
#if defined(CONFIG_ARCH_DAVINCI_DA8XX_BASE_DDR)
#define PHYS_OFFSET DA8XX_DDR_BASE
#else
#define PHYS_OFFSET DA8XX_SDRAM_BASE
#endif
#else
The kernel starts but stalls when initializing the SPI1 controller (my
u-boot is able to use the flash on SPI1just fine). After some checking
it seems accessing the SPI1 registers is the problem, sort of like
accessing an address not mapped with the MMU. To verify this, I added
different debugging traces to my board_init to see if execution would
halt:
printk( "GPIO: %x\n", __raw_readl(IO_ADDRESS(0x01E26000))); //OK
printk( "EDMA3 TC2: %x\n", __raw_readl(IO_ADDRESS(0x01E38000))); //OK
printk( "eHRPWM0: %x\n", __raw_readl(IO_ADDRESS(0x01F00000))); //Stalls
printk( "SPI1: %x\n", __raw_readl(IO_ADDRESS(0x01F0E000))); //Stalls
I don't see how my change to the PHYS_OFFSET would affect this, but
this is the only change I can think of that might affect this.
Any leads or suggestions would be appreciated.