RTOS/XEVMK2LX: PCIe link training failed with PHY loopback(Root Complex Mode)

Tool/software: TI-RTOS

I am checking the PHY loopback using the PCIe sample source.

(Reference document sprugs6d.pdf - 2.12.2 PHY Loopback)

I made the changes to the document.

(Attach code file)

But...It's not work, Wait for link to be up

I do not know why. Thank you for your help.

Development environment -DSP  CCS 7.1 / pdk_k2l_4_0_6  

4331.pcie_sample.c