Hi, all:
I just doing some work based on DM8127, using edma transfer video data from ddr into L2 ram space for quicking algorithm process, but it doesn't work, it seem that the L2 ram is unaccessable to edma. I have done many tests, the result is same, the data in the destination address space keep unchanged after edma transfer(ddr --> l2 ram) , so i have two questions:
1) is there have some control for edma access l2 ram space?
2) in the dsp side, i have allocated 128k cache space, remains 128k for l2 ram user defined. so the cache address space is 0x1080 0000 to 0x10820 0000(i get this from dsp map file), than the user's l2 ram located in 0x0820 0000 to 0x0840 0000 adress space? I'm not sure, i take the 0x10820 0000 to 0x10840 0000 as the edma destination address, the result is same.
my test code please see attachmentTestCode.rar, any tips or advise is welcomed., thanks lot!
